Power Management on OpenVMS

1
Power Management on OpenVMS

• Burns Fisher
• VMS Engineering

2
Business challenges of Today
Rising consumption of energy

• Cost of energy is rising
• Compute density is increasing
• Systems require more energy to power and cool
• Costs more to cool a server
  than to power it
• Next year, half the worlds data centers will be
  functionally obsolete, due to insufficient Power
  Cooling

Source Processor.com July 27, 2007 by
Chickowski quoting the Uptime Institute
estimates. Data Center News, Gartner predicts
data center power and cooling crisis, June 14,
2007 by Bridget Botelho, quoting Mr. Michale Bell
Vice President at Gartner Inc.
3
What problem are we really solving?

• Server power consumption has risen faster than
  customers can handle

• Concerns
• Data center power and cooling capacity limits
  being reached
• Rising power costs
• Green emphasis (regulatory or otherwise)
• HP has the most complete power and cooling
  portfolio to improve the performance of your data
  center

4
HP power management solution
Pillars of Innovation for HP value-add through
power and thermal management

• Efficiency (consume less energy)
• High perf/power and Gbyte/power ratios, efficient
  cooling systems
• Frees power for more computing
• Managed provisioning (fit more into a given
  facility)
• Power cooling capacity planning and control
  lets you size your facility for true demand
• Fully utilize infrastructure eliminate wasteful
  over-provisioning
• Monitoring, control, and automation (simplify
  operations)
• Measure every watt and degree
• Autonomously balance IT workload with power
  cooling resources for maximum utilization of
  facility at lowest cost

5
Delivering a holistic Energy Efficient Solution
Optimizing from chip to chiller
Itanium 9100 Series, Xeon, AMDLow power
processors, Demand based switching,
Efficient Systemsefficient power supplies
HP BladeSystem HP Thermal Logic
Energy Saving Solutions from the Server Chip to
the Data Center Air Chillers and everything
in-between
Power Distribution Rack MCS 3 phase UPS and
liquid cooling
Insight Power Manager iLO 2 Monitor and
regulate energy./power
Virtualization and ConsolidationHP Virtual
Server Environment
VSE
Storage Thin Provisioning / Dynamic Capacity Mgt
HP Services Thermal MappingThermal Assessments
HP Dynamic Smart Cooling up to 45 cooling cost
savings w/Mapping
6
What I will talk about today
Itanium 9100 Series, Xeon, AMDLow power
processors, Demand based switching,
Efficient Systemsefficient power supplies
HP BladeSystem HP Thermal Logic
Power Distribution Rack MCS 3 phase UPS and
liquid cooling
Insight Power Manager iLO 2 Monitor and
regulate energy./power
Virtualization and ConsolidationHP Virtual
Server Environment
Storage Thin Provisioning / Dynamic Capacity Mgt
HP Services Thermal MappingThermal Assessments
HP Dynamic Smart Cooling up to 45 cooling cost
savings w/Mapping
7
Power Monitoring

• Done autonomously by platform
• No support from OS required
• Only available on some recent platforms with
  certain options
• Available via text, web, or IPM

8
Power Monitoring via iLO Text Interface
9
Power Monitoring via iLO Web Interface
10
Power Control or Management

• Different controls and interfaces available in
  different platforms
• Some recent platforms Interface available via
  iLO text, iLO web, IPM, or OS-specific.
• All I64 platforms running VMS V8.2-1 or later At
  least a sysgen parameter

11
iLO Commands

• Static High Performance
• Dont try to save any power. Performance is
  paramount
• Static Low Power
• Do anything you can to save power short of
  shutting down
• Dynamic (Also called Efficiency)
• Choose some OS-defined scheme to make a
  reasonable compromise between power savings and
  performance
• OS Control
• Use some OS-defined interface to control
  power/performance decisions

12
Power Management Serial Line
13
Power Management iLO Web Interface
14
Power Saving Toolbox

• What does the OS have available to save power on
  Integrity Platforms (right now)?
• C-states
• P-states
• Scheduler

15
Power Saving Toolbox

• C-states
• Idle states processor cant do work while saving
  power
• C0 is normal run state
• C1 is stop processor but keep everything
  coherent
• Higher numbers stop more and more stuff
• On Itanium, C1 is entered with PAL_HALT_LIGHT
• Exit C1 via an interrupt
• Available on all VMS-supported I64 processors
• Power reduction varies with processor
• Increases interrupt latency since CPU must turn
  back on

16
Power Saving Toolbox

• P-states
• Power/performance states used when processor is
  active
• P0 is the highest performance (and probably
  highest power)
• Pn uses less power (and probably has lower
  performance) the higher n goes. Nmax varies
  with processor
• Only available on some processor variants
  starting with Montvale
• Power/performance tradeoff varies with processor

17
Power Saving Toolbox

• Scheduler
• Aside Power Domains
• Power Domain means which CPUs work together to
  save power
• Example If CPU 2 and 3 are different cores on
  the same chip, they both need to agree on a lower
  p- or c-state before you get the full benefit
• One might save power by scheduling active jobs so
  that cores on the same chip are idle (and can go
  into C1).

18
What Has VMS Done?

• V7.x Tadpole (Alpha)
• V8.2 Nothing
• V8.2-1and V8.3
• C1 state when we predict CPU will be idling
  frequently
• Controlled by SYSGEN parameter CPU_POWER_MGMT and
  CPU_POWER_THRSH
• Default Turned on
• Processors All supported (different results)
• V8.3-1H1
• Same algorithm available, but default is off

19
What Will VMS Do in Future Releases?

• Stopped (and iCAP) CPUs will go into C1 state
• When supported, iLO/IPM controls take precedence
• If not supported, VMS falls back to OS Control
• Expected implementation of iLO states described
  below
• Ideally would vary somewhat with platform

20
Reminder iLO Commands

• Static High Performance
• Dont try to save any power.
• Static Low Power
• Save power at the expense of performance
• Dynamic (or efficiency)
• Use OS-defined scheme to make a reasonable
  compromise between power savings and performance
• OS Control
• Use OS-defined interface to control
  power/performance decisions

21
OS Control

• Can use new system service POWER_CONTROL
• POWER_CONTROL can choose
• POWERC_HIGH_PERF
• POWERC_LOW_POWER
• POWERC_EFFICIENCY
• Advantage You can write a program to use in a
  batch job run on a schedule, or any other scheme
  you wish
• POWER_CONTROL is flexible enough for us to add
  additional features later (no specific plans)
• Returns SS_WRONGSTATE if called when not in
  OS_CONTROL state

22
Highest Performance

• No C1 state in idle just loop in P0/C0
• Never use any p-state other than P0
• In other words, just like V8.3-1H1s default

23
Lowest Power

• All CPUs run in Pn state (where n is the lowest
  power available)
• Use C1 state in idle with threshold0 (i.e.
  always use C1).
• It is possible that C1 will not save any power
  over Pn in idle, in which case we will not use it.

24
Dynamic/Efficiency

• Non-idle CPUs will be in P0 state
• Idle CPUs will choose C1 state using a new
  algorithm (by default)

25
New C1 Idle Algorithm

• Chosen by sysgen CPU_POWER_MGMT
• 0 No idle C-state use
• 1 Old algorithm (based on percent time spent in
  idle)
• 2 New algorithm (based on how often CPU leaves
  idle)

26
Idle Power Algorithms

• General idea
• Go into C1 state in idle if interrupts are not
  expected
• Algorithm decides when to use C1 state in idle
• Trigger point determines when we stop using
  C-states
• Selecting Algorithms
• Turned off CPU_POWER_MGMT 0
• Old algorithm CPU_POWER_MGMT1
• New algorithm CPU_POWER_MGMT2

27
Idle Power Algorithms

• Trigger measurement
• Old algorithm
• Percentage of time in idle for previous second
• Measured by sampling idleness every 1 ms.
• Threshold chosen by CPU_POWER_THRSH
• C-state decision made each second based on past
  second
• New algorithm
• Number of exits from idle
• Count each interrupt and each scheduler exit
• If threshold exceded immediately stop C1 use

28
Idle Power Algorithms

• Resume power savings after threshold exceeded
• Old algorithm
• If percent of idle samples in previous second
  exceeds required threshold
• New algorithm
• If no millisecond during the previous second
  exceeded the number-of-idle-exits threshold

29
New Idle Power Algorithm

• Summary
• New algorithm uses criteria more relevant to the
  behavior you want
• New algorithm switches off C-state idle to avoid
  interrupt latency more quickly
• New algorithm switches back to power savings and
  higher latency fairly slowly like previous
  algorithm

30
Summary

• VMS has power saving mechanisms on Integrity now
• Starting with the next release, VMS will take
  part in HPs power saving program
• Simplest interface via Management Processor web
  or serial interface-just three choices High,
  low, compromise
• System service available for more flexibility
• Use Insight Power Manager for maximum flexibility
  and integration