Diapositive 1

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MIMOSA 13
Minimum Ionising particle Metal Oxyde
Semi-conductor Active pixel sensor GSI Meeting,
Darmstadt
Sébastien HEINI 10/03/2005
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Summary

• Charge sensing element PhotoFET.
• Readout in current mode
• MIMOSA 13 a highly granular and fast sensor.
• Conclusion and outlook.

Sébastien HEINI 10/03/2005
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PhotoFET charge sensing element
- 100 fill factor - N-WELL/P-epi Diode. -
Liberated Charge 80e-/µm/MIP - Collection time
100ns

• Advantages
• - Built-in charge-to-current amplification
• high sensitivity
• Large DC swing
• High speed readout

- The collected charge affects the threshold
voltage of the PMOS transistor
- Modulation of the transistor current ? signal
amplification resulting in conversion of the
generated charge to current
Sébastien HEINI 10/03/2005
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Optimal operation point and result of the PhotoFET

• Optimal running S/N point determined by
  simulation.
• Isf_ bias 1µA
• - Signal 773 pA / e -
• - Noise 49 e -
• - S/N 34

Number of pixels

• - 1M events analysis.
• - Blue curve neighbour pixel hit response
  distribution analysis
• Green curve calibration pick due to a Fe55 X
  ray irradiation on the central pixel
• Signal / noise depend on neighbour pixel hit

ADC count
Sébastien HEINI 10/03/2005
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Current mode readout

• Advantages
• High speed readout.
• Charge collected is amplified inside the pixel.
• Low impedance is in the amplifier (outside of the
  array).
• Pixel output simple using a current memory.
• Large DC swing.

Sébastien HEINI 10/03/2005
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Objective of MIMOSA 13

• High gain sensing element.
• DC current compensation.
• Noise reduction of the PhotoFET structure.
• AC coupling test for lower noise contribution.
• - Obtain a readout time faster than 100ns.
• Direct access to the PhotoFET for
  caracterisation.
• Test of a real fast amplifier architecture.
• (readout time faster than 50ns).
• - Test of the chip MIMOSA 13 in fast operation
  mode.
• Pixel array 20 x 64 (pixel pitch 20µm).
• Compatibility with datas acquisition of
  existing system.

Sébastien HEINI 10/03/2005
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MIMOSA 13 Topology

• Technology AMS 035.
• (4 metal layer).
• Substrate low doped Hi resistivity substrate
  (8-10 O.cm).
• Chip Area 5,1mm²
• Nb of pads 44
• Pads spacing 50µm
• Gnd 4
• Digital 11
• Vdd 1
• Out 10
• Selection 3
• Bias 8
• Vdda pixel 4
• Vdda ampli 2

Sébastien HEINI 10/03/2005
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Global view of MIMOSA 13 architecture
.
Column
Pixels Array
........
........
DIG. bloc
row
PhotoFET
.
memory
Parallel readout
Amplifier

Current output
Reaout line metal wire
Sébastien HEINI 10/03/2005
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MIMOSA 13 Pixels Array (New PhotoFET)
Dummi Pixel   Mimosa 7 photofet pixel to solve
process continuity problems
Pixel A1 10 x 16
Pixel B1 10 x 16
Pixel A1  Mimosa7 avec Photofet pixel, new
layout.
Pixel A2  Modified Photofet, source follower
bandwith limitation, memory W/L3 cap,
Photofet with W/L3.
Pixel A3  Modified Photofet, source follower
bandwith limitation, memory W/L3 cap,
Photofet with W/L2,2.
Pixel A2 10 x 16
Pixel B2 10 x 16
Pixel A4  Modified Photofet, source follower
bandwith limitation, memory W/L2 cap,
Photofet with W/L2,2.
Pixel B1  Pixel with Pmos transistor and AC
coupling, Current mirror reference and
compensation, memoiry W/L3 cap.
Pixel A3 10 x 16
Pixel B3 10 x 16
Pixel B2  Pixel with Pmos transistor and AC
coupling gate cap, directe reference and
compensation, memoiry W/L3 cap.
Pixel B3  Pixel with Pmos transistor and AC
coupling Nmos cap, directe reference and
compensation, memoiry W/L3 cap.
Pixel A4 10 x 16
Pixel B4 10 x 16
Pixel B4  Pixel with Pmos transistor and AC
coupling Nmos cap, High gain, directe reference
and compensation, memoiry W/L3 cap.
Matrice de Mosaic 2 64 rows of 20 pixels (20 x
20µm pitch). Successive row readout
10 Sorties analogique I
10 Sorties analogique I
Sébastien HEINI 10/03/2005
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MIMOSA 13 Array
VDDA_SF
VDDA_PHFET

• 6 x 64 command lines.
• Successive row readout
• Write and read pattern is equal for all the
  pixels (A1 B4).
• 100ns for the memory writing.
• 100ns for the readout of the memory

SW_PWON
SW_W_M1
OUT
SW_W_M2
Pixel
SW_R_M1
SW_R_M2
SW_R_PH
BIAS_pixel
GND
?-------- 100ns -------?
?-------- 100ns -------?
Sébastien HEINI 10/03/2005
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Pixel structure

• - Signal is contain in noise
• Fixe Pattern Noise
• Electronic noise
• (thermal, 1/f, shot noise)
• Signal is extract using
• (CDS) correlated double sampling
• S1t1, S2t2 ? Signal S1 - S2

Sébastien HEINI 10/03/2005
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Amplifier and multiplexer structure
10 input analog I
10 input analog I
Dc current Compensation bloc
Bias_comp
Sel amp Sel dir Bias A1 Bias A2
Ampli
Ampli
Sel 1_2
Analog multiplexer
10 output analog I
Mux 2 vers 1
Classic amplifier, gain 10
Analog output
Fast amplifier
Sébastien HEINI 10/03/2005
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Conclusion and outlook

• Current mode maybe adapted to the high speed and
  high granularity requirements.
• Most of the design is realized.
• Submission on 25 march 2005.

• Design of the test bench for MIMOSA 13.
• Test and analysis of MIMOSA 13 chip.
• Work over an fast ADC flash for analog signal
  conversion.

Sébastien HEINI 10/03/2005
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Pixel type A1, A2, A3, A4
- 6 commandes Sw_pwon Sw_r_ph Sw_w_m1 Sw_w_m2 Sw
_r_m1 Sw_r_m1
Sébastien HEINI 10/03/2005
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Pixel type B1
- 6 commandes Sw_r_ph Sw_w_m1 Sw_w_m2 Sw_r_m1 Sw
_r_m1
Sébastien HEINI 10/03/2005
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Pixel type B2, B3, B4
- 6 commandes Sw_r_ph Sw_w_m1 Sw_w_m2 Sw_r_m1 Sw
_r_m1
Sébastien HEINI 10/03/2005
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Bloc damplification gain 10
Sébastien HEINI 10/03/2005
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Bloc damplification rapide
Sébastien HEINI 10/03/2005