EECE 631 Microcomputer System Design Lecture 14 SPI

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EECE 631Microcomputer System DesignLecture 14
SPI

• Spring 2008
• Chris Lewis
• clewis_at_ksu.edu

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SPI Signals
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• The AD5382 is a 32-channel, 14-Bit DAC and is
  available in a 14 mm x 14 mm 100-lead LQFP
  package. It operates from a single 3 V or 5 V
  supply. Programmable gain (m) and offset (c) are
  provided per channel to facilitate system
  calibration. Each DAC channel is double-buffered
  which allows all DAC outputs to be updated
  simultaneously via a pin. Each channel has an
  on-chip output amplifier which allows
  rail-to-rail operation. The AD5382 includes an
  internal 1.25 V/2.5 V low-drift reference. The
  AD5382 contains a parallel interface with a
  pulsewidth of 20 ns, a 30 MHz SPI interface and a
  400 kHz I2C-compatible interface.

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Binary Weighted Summing DAC
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R-2R Ladder DAC
Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
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Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
7
DAC Static Performance Specs

• Differential Non-Linearity (DNL)
• Variation in the spacing between adjacent analog
  output voltage values from the ideal 1LSB value.
• Integral Non-Linearity (INL)
• Worst case variation in any of the analog output
  values wrt ideal straight line through the end
  points.
• Non-Monotonicity
• Increase in digital code input causes a decrease
  in the analog output value.
• Gain Error
• Error between the analog output for maximum
  digital input and the desired value.
• Offset Error
• Error between the analog output for zero digital
  input and zero.

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What do they Tell Me?

• Differential Non-Linearity
• The maximum change from ideal for a step
• A step should be 1 Least significant bit (LSB)
• If we have an differential non-linearity of 1/2
  LSB, then a step may be from 1/2 LSB to 1 1/2
  LSB.

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What do they Tell Me?

• Differential Non-Linearity
• Integral Non-Linearity (INL)
• The maximum possible error from an ideal DAC
  transfer function and what you really get.

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Non-Linearity
Source www.intersil.com/data/AN/AN9/AN9741/AN9741
.pdf Figure 10, p4.
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What do they Tell Me?

• Differential Non-Linearity
• Integral Non-Linearity (INL)
• Non-Monotonicity
• There is a region where an increase in the
  digital value does NOT give an increase in the
  output voltage. Can cause control system
  problems.

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Non-Monotonicity
Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
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What do they Tell Me?

• Differential Non-Linearity
• Integral Non-Linearity (INL)
• Non-Monotonicity
• Offset Error
• Can be measured by the output voltage for a
  digital value of 0 and removed by level shifting
  the output voltage.

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Offset Error
Source www.intersil.com/data/AN/AN9/AN9741/AN9741
.pdf Figure 8, p4.
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What do they Tell Me?

• Differential Non-Linearity
• Integral Non-Linearity (INL)
• Non-Monotonicity
• Offset Error
• Gain Error
• The difference in the slope of the output voltage
  from the ideal. Can be corrected after the offset
  error has been removed. Normally measured at the
  maximum output after offset has been removes
  since the slope may not be a constant.

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Gain Error
Source www.intersil.com/data/AN/AN9/AN9741/AN9741
.pdf Figure 9, p4.
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DAC Dynamic Performance Specs

• Settling Time
• Glitch Impulse Area
• Harmonic Distortion
• Signal-to-Noise Ratio
• Audio Specific Specifications

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What do they tell us?

• Settling Time
• How long we need to wait after an input change
  until the output is within 1/2 LSB. Gives a
  good idea of the maximum rate of change that the
  DAC can be used for.

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Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
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Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
21
What do they tell us?

• Settling Time
• Glitch Impulse Area

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(No Transcript)
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Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
24
Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
25
What do they tell us?

• Settling Time
• Glitch Impulse Area
• Harmonic Distortion
• How much distortion you will get if you expect to
  put out a specified waveform.

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What do they tell us?

• Settling Time
• Glitch Impulse Area
• Harmonic Distortion
• Signal-to-Noise Ratio

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What do they tell us?

• Settling Time
• Glitch Impulse Area
• Harmonic Distortion
• Signal-to-Noise Ratio
• Audio Specific Specifications

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Sampling Rate

• Nyquists Criteria
• An Analog signal with a bandwidth of fa MUST be
  sampled at a rate fs gt 2fa to avoid loss of
  information.
• If fs lt 2fa then a phenomena called aliasing will
  occur in the analog signal bandwidth

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Time Domain Effects of Aliasing
Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
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Analog to Digital Converter

• Types
• Flash
• Counter
• Hybrid
• Integrating
• Sigma-Delta
• Others exist
• Static Performance Specifications
• Dynamic Performance Specifications

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Flash ADC
Source www.stanford.edu/class/ee315/handouts/HO20
_ADC.pdf
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Counter ADC
Source www.upscale.utoronto.ca/GeneralInterest/
Drummond/Micro/ln_a_d.pdf
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Successive Approximation ADC
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Hybrid ADC

• Several types
• Convert the M most significant bits with a
  successive approximation ADC and the N least
  significant bits with a Flash ADC for a MN bit
  converter
• Convert the M most significant bits with a flash
  ADC

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Integrating ADC Single Slope
Source www.stanford.edu/class/ee315/handouts/HO20
_ADC.pdf
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Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
37
Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
38
Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
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ADC Comparison
Source www.upscale.utoronto.ca/GeneralInterest/
Drummond/Micro/ln_a_d.pdf
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Quantization noise

• Because the ADCDACs output only 2n levels
  there is inherently noise in the quantized output
  signal. The ratio of the signal to this
  quantization noise is called SQNR. The SQNR in dB
  is approximately equal to 6 times the number of
  bits of the ADC
• 20Log(SQNR) 6bits
• So for a 16 bit ADC this means that the SQNR is
  approximately equal to 96dB.

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Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
42
ADC Static Performance Specs

• Differential Non-Linearity(DNL)
• Integral Non-Linearity (INL)
• Missing Codes
• Gain Error
• Offset Error

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Source Analog Devices, Mastering the Mix in
Signal Processing, Mixed-Signal Design Seminar,
1991
44
ADC Dynamic Performance Specs

• Signal-to-Noise Plus Distortion (S/ND)
• Effective Number of Bits
• Spurious Free Dynamic Range (SFDR)
• Total Harmonic Distortion (THD)
• Full-Power Bandwidth(FPBW)
• Full-Linear Bandwidth
• Intermodulation Distortion (IMD)
• Aperture Delay Time and Aperture Jitter
• Transient Response
• Overvoltage Recovery