Decimation Filtering For Complex Sigma Delta Analog to Digital Conversion in A LowIF Receiver

1
Decimation Filtering For Complex Sigma Delta
Analog to Digital Conversion in A Low-IF Receiver

• Anjana Ghosh
• SERC, Indian Institute of Science
• Bangalore
• February 2006

2
Presentation Outline

• Fundamentals of Receiver Operation
• Salient features of ?? ADC
• Decimation Filtering for Low Pass ?? ADC
• Existing literature on decimation for bandpass ??
  modulators
• Proposed architecture

3
Receiver Architectures A Heterodyne Receiver
if

4
Low IF Receiver
Frequency Downconversion
Digital Filtering, Baseband Downconversion ,
Demodulation
A
cos?ct
X
RF Stage
Analog to Digital Conversion
B
sin?ct
Y
Receiver Block Diagram
5
ADC Sample rate Effect on Analog Antialias
Filter (AAF)
6
ADC Quantization Noise
7
Decimation Digital Filter for ?? ADC

• Purpose of decimation filters Antialias
  filtering followed by sample rate reduction
• Multistage Decimation preferred to single stage
• Popular structure consists of a Cascaded
  Integrator comb followed by one or two FIR stages

8
CIC Filter

• Moving Average Filter
• Z transform

9
Order of the CIC Filter For A Low Pass ?? ADC

• For a ?? modulator of order l, a CIC of order l1
  is suitable for antialias filtering in the first
  stage of decimation
• This CIC can be used to reduce the sample rate to
  as low as 4 times the Nyquist sampling rate with
  negligible SNR degradation (lt0.25dB). Further
  reduction in the sample rate using the CIC will
  degrade the SNR significantly.

10
CIC Structure (Second Order)
11
Efficient Polyphase Decomposition of Comb Filter
12
Modified SINC
13
Noise Transfer Function(NTF) and Signal Transfer
Function(STF)
14
Complex Downconversion Decimation
15
Decimation structure for Band pass Complex S D
modulator
Bandpass S D
Complex S D
Existing Art Downconversion of IF signal to
Baseband followed by Standard Low Pass Decimation
Digital Filter
16
New Decimation Filter Architecture Motivation

• Accepted approach imposes restrictions on the
  choice of ? in order to take advantage of the
  optimization in the mixing process
• Compatability with the existing GPS engine

17
New Architecture Block Diagram
A
X
cos?ct
Anti alias Filter and Complex Bandpass ??
Modulator
Digital Decimation Filters
RF Stage
Digital Baseband
sin?ct
B
Y
18
Low IF Receiver Signal Spectrum
A
cos?ct
RF Stage
sin?ct
B
desired signal
image signal band
RF
?
-?
?c - ?if
?c
-?c
?c ?if
-?c -?if
-?c ?if
0
1/2
C (cos?ct)
-?
?
?c
-?c
0
j/2
S (sin?ct)
?c
?
-?
-?c
0
-j/2
1/2
AIPC
?
-?
?if
-?if
0
j/2
BIPS
?
-?
?if
0
-?if
-j/2
1
IF
?
-?
?if
-?if
0
19
Use of Complex Digital Filters
A
X
Anti alias Filter and Complex Sigma Delta
Modulator
P
DF1 (Complex Digital Filter)
cos?ct
RF Stage
j
OP
sin?ct
-j
Y
DF2 (Complex Digital Filter)
Q
desired signal
image signal band
IP
-?
?
?c
-?c
-?c -?if
?c ?if
?c - ?if
-?c ?if
0
1/2
AIPcos?ct
-?
?
?if
-?if
0
BIPSin?ct
j/2
-?
?
?if
-?if
0
-j/2
Noise Transfer Function
XA?? YB??
DF1 Transfer Function
PXjY
?
-?
0
?if
-?if
DF2 Transfer Function
Noise Transfer Function
QX-jY
?
-?
?if
-?if
0
OP
1
?
-?
?if
-?if
0
20
Complex Digital Filters Real Filters From
Complex Filters
DF1 Transfer Function

• HDF1(z) HRE(z) - j.HIM(z)
• HDF2(z) HRE(z) j.HIM(z)
• OP P(z).HDF1(z) Q(z).HDF2(z)
• gtOP X(z) j.Y(z).HRE(z) - j.HIM(z)
  X(z)-j.Y(z).HRE(z) j.HIM(z)
• gt OP 2.X(z). HRE(z) Y(z). HIM(z)

-?
?
?if
-?if
0
DF2 Transfer Function
?
-?
?if
-?if
0
Thus the Complex Digital Filtering can be
accomplished by using two real filters
corresponding to the real and imaginary parts of
the transfer function of the individual complex
filters.
21
Complex Digital Filters Implementation
A
HRE(z)
cos?ct
C
Antialias Filter and Complex Sigma Delta Modulator
X
RF Amp and Filter
real
IP
OP
imaginary
90o
Y
sin?ct
S
B
HIM(z)
Real Filter Implementation of Digital Filtering,
at Low IF. Advantage Number of Computations
reduced from eight to two
22
Decimation Filter Requirements

• antialias filtering and reduction of the sample
  rate by 16
• attenuation of remaining out of band components
  in the signal
• generation of a real two sided signal centered
  around wif

23
Multistage Decimation Filter Structure
24
ADC Output FFT
25
AAF1 Fourth Order Comb
Passband (3-5MHz) droop 0.33dB Stopband
Attenuation 83.1dB Aliasing Bands 59MHz to
69MHz, 123MHz to 128MHz on either side
26
AAF2 11 Tap HalfBand
Passband (3-5MHz) Ripple 0.0027dB/-0.0054dB
Stopband Attenuation 75.8 dB Aliasing Bands
27MHz to 32MHz on either side
27
Image Reject Filter
Passband (3-5MHz) Ripple 0.0027dB/-0.0054dB
Stopband Attenuation 75.8 dB Aliasing Bands
27MHz to 32MHz on either side
28
Image Reject Filter Stopband
29
Image Reject Filter Ripple, Phase Response
Passband Droop 0.94dB
Phase Response
30
Droop Correction filter
31
Net Transfer Function
32
Decimation Filter Structure
33
FFT of Silicon Data For A Single Tone Input
34
Optimized Architecture Scope
Low Pass
Complex Band Pass
Low Pass
Band Pass
Scope for optimization Complex Bandpass?
35
Alternate Architecture Block Diagram
36
Alternate Architecture IDecimate By 16
37
Shifted 4th Order Comb Stage 1

• 13 tap , 15 bit coefficient quantization
  performs decimation by 4
• Passband 3MHz to 5 MHz
• Aliasing bands 67MHz to 69MHz, -59MHz to -61
  MHz, -123MHz to -125MHz

38
Shifted 4th Order Comb Stage 2

• 5tap , 11 bit coefficient quantizationperforms
  decimation by 2
• Passband 3MHz to 5 MHz
• Aliasing bands 35MHz to 37MHz, -27MHz to -29 MHz

39
Shifted 4th Order Comb Stage 3

• 5 tap, 11 bit coefficient quantization Performs
  decimation by 2
• Passband 3MHz to 5 MHz
• Aliasing bands 19MHz to 21MHz, -11MHz to -13 MHz

40
Image Reject Filter

• 5 tap, 15 bit coefficient quantization
• Passband 3MHz to 5 MHz
• Aliasing bands 19MHz to 21MHz, -11MHz to -13 MHz

41
Optimized Architecture
Multiplier less polyphase implementation
CSD coded multiplier less polyphase
implementation
42
Comparison of Transfer Function Original
Architecture and Architecture I
43
Comparison of Transfer Function Original
Architecture and Architecture I
Comparison of Image Rejection
Comparison of Passband Ripple
44
Optimized Architecture II
Shifted COMB
Low Pass COMB
45
Decimation Filter Stages in Architecture II
46
Comparison of the Three Architectures
47
Summary

• Architecture and design of decimation digital
  filtering of the output of a complex ?? modulator
  for low IF receivers is proposed.
• Two optimized implementations with variations of
  the same basic architecture are proposed

48
Reference

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