IA-64 Architecture - PowerPoint PPT Presentation

Loading...

PPT – IA-64 Architecture PowerPoint presentation | free to download - id: 81b70e-ZTRjY



Loading


The Adobe Flash plugin is needed to view this content

Get the plugin now

View by Category
About This Presentation
Title:

IA-64 Architecture

Description:

IA-64 Architecture RISC designed to cooperate with the compiler in order to achieve as much ILP as possible 128 GPRs, 128 FPRs 64 predicate registers of 1 bit – PowerPoint PPT presentation

Number of Views:20
Avg rating:3.0/5.0
Slides: 9
Provided by: basi158
Category:

less

Write a Comment
User Comments (0)
Transcript and Presenter's Notes

Title: IA-64 Architecture


1
IA-64 Architecture
  • RISC designed to cooperate with the compiler in
    order to achieve as much ILP as possible
  • 128 GPRs, 128 FPRs
  • 64 predicate registers of 1 bit
  • Similarities with VLIW
  • Instruccions are issued in templates of up to 3
  • The compiler marks the limits between groups of
    instructions that can be executed in parallel

2
Predication in IA-64
  • Particularly useful for branches difficult to
    predict
  • Increases ILP, but can also increase critical
    path length
  • Predication on registers that mark the result of
    the conditions for conditional branches
  • Allows the parallel execution of several branches
  • IA-64 allows to predicate almost all its
    instructions

3
Example
4
Memory ReferencesSpeculation (I)
  • Speculation on data dependences
  • A load bypasses a store that could affect the
    same memory position
  • The speculative/advanced load ,ld.a, stores the
    address accessed and the modified register in the
    ALAT (Advanced Load Address Table)
  • Addresses affected by storage operations are
    verified in the ALAT
  • If the address matches an address in any entry,
    it is marked

5
Memory ReferencesSpeculation (II)
  • Before a non-speculative usse of the data
    generated by the speculative load, the ALAT is
    verified
  • Entry is not marked ? correct execution clear
    entry
  • Entry is marked ? speculation failed. The action
    to take depends on the check instruction that is
    used.
  • Two kinds of check
  • ld.c On failure, reload the data, now with the
    correct value. It is used when the data has not
    been used yet
  • chk.a provides also the address of a routine to
    execute that solved the problems generated by the
    failure. It re-executed the load and the
    additional instructions that have used the
    preloaded value

6
Example
Source Code
Standard Load
Advanced Load
7
Control Speculation for Loads
  • Speculation on control dependences
  • A special bit (NaTNot a Thing) associted to the
    destination register marks the success of the
    load
  • In the FP registers it is a value called NaTVal.
  • The potential exceptions associated to these
    loads, ld.s, are defered till the control
    dependences are solved
  • This is not the case for the memory reference
    speculation
  • chk.s verifies the NaT bits / NatVal values
  • Both kinds of load speculation can be combined
    with the instruccions ld.sa and chk.a

8
Example
Source Code
Speculative Load
About PowerShow.com