Real-Time Speech Pitch Shifting on an FPGA

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Real-Time Speech Pitch Shifting on an FPGA

• Habib Estephan
• Scott Sawyer
• Dan Wanninger
• Dr. Kevin Buckley, Advisor

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Project Objective

• To design and implement a high quality speech
  pitch shifter on an FPGA that allows real-time
  microphone input and speaker output.

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Digital Signal Processing and FPGAs

• Improved performance and flexibility over DSPs
  and other dedicated microprocessors
• More economical than custom ASICs for low-cost or
  low-volume applications
• Abstract design tools significantly simplifiy
  programming over conventional HDLs

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SSB Frequency Shifting

• Single sideband frequency shifting is a linear
  shift of the spectral components of a signal
  using the Hilbert Transform.
• It does not preserve the harmonic nature of
  sound, and the result is of low quality.

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Time Domain Algorithm

• Synchronized Overlap-Add Method (SOLA)
• Pitch estimation is required to identify
  individual periods
• Inserting/Removing periods in order to
  stretch/compress signal
• Resampling restores the original length while
  altering the pitch

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Time Domain Algorithm

• Sample Audio
• Original
• Up Shifted
• Down Shifted

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Time Domain Algorithm
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Frequency Domain Algorithm

• Windowed FFTs taken and IFFTs offset to time
  shift input
• Phase terms adjusted to remove discontinuities
• Time shifted signal resampled to alter pitch
• Higher fidelity but increased complexity

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Frequency Domain Algorithm

• Sample Audio
• Original
• Up Shifted
• Down Shifted

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Simulink and Xilinx System Generator
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Up Pitch Shifter
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Achievements and Deliverables

• Two high fidelity algorithms simulated in MATLAB
• Successful real-time FPGA implementations of the
  time domain approach