Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems

1
Energy-Efficient Mapping and Scheduling for DVS
Enabled Distributed Embedded Systems

• Marcus T. Schmitz and Bashir M. Al-Hashimi
• University of Southampton, United Kingdom

Petru Eles Linköping University, Sweden
2
Contents

• Motivation Introduction
• Dynamic Voltage Scaling
• Co-Synthesis with DVS Consideration
• DVS optimised Scheduling
• DVS optimised Mapping
• Experimental Results
• Conclusions

3
Motivation

• Low Energy
• Portable Applications
• Autonomous Systems
• Feasibilty Issues (SoC - heat)
• Operational Cost and Environmental Reasons

• System Level Co-Design
• Shrinking Time-To-Market Windows
• Reducing Production Cost
• High Degree of Optimisation Freedom

4
Introduction
Dynamic Voltage Scaling
System Level Co-Synthesis
Energy-Efficient Co-Synthesis for DVS Sytems
5
Dynamic Voltage Scaling (DVS)
Energy vs. Speed
1.2
DVS Processor
1
Frequency
0.8
f Reg.
VR
Energy
0.6
Voltage/Frequency
0.4
0.2
0
1
1.5
2
2.5
3
3.5
4
4.5
5
1/Speed
Available from Transmeta, AMD, Intel
6
Co-Synthesis for DVS Systems
System Specification, Technology Lib.
Allocation
Mapping
Scheduling
Designer driven
EE-GMA
Voltage Scaling
EE-GLSA
Evaluation
7
DVS in Distributed Systems 23
Input Scheduling (mapping) Power profile
Output scaled voltage for each DVS task
Emax
Esc lt Emax
P
P
Slack
PE0
PE0
CL0
CL0
2.3V
2.4V
3.3V
PE1
PE1
d
d
t
t
_at_ Vmax
_at_ dyn. V
8
Energy-Efficient Scheduling

• Two objectives
• Timing feasibility
• Garantee deadlines
• Low energy dissipation
• Optimisation DVS usability Slack time

Traditional scheduling technique focus mainly on
timing feasibility!

• Problem due to power variations
• Simply increase deadline slack leads to
  sub-optimal solutions!

9
Energy-Efficient Scheduling
S1
E71?J
E65.6?J
P
P
PE0
t
t
t
t
5
4
4
5
Slack ? Savings ?
DVS
PE1
t
t
t
t
1
1
2
t
2
t
0
0
Slack
PE2
t
3
t
6
t
t
3
6
t
t
S2
E71?J
E53.9?J
P
P
Slack
Slack ? Savings ?
PE0
t
t
5
4
t
t
4
5
DVS
PE1
t
t
t
t
1
1
2
t
2
t
0
0
PE2
t
t
3
3
t
t
6
6
t
t
10
Energy-Efficient Scheduling

• Based on Genetic List Scheduling Algorithm 6,10
• Task priorities are encoded into priorities
  strings

Schedule

• Duties of the Scheduler
• Select ready task with highest priority
• Schedule selected task
• Update schedule and ready list
• Repeat until no un-scheduled task is left

PS
4 3 9 7 2
11
EE-GLSA
3
7
8
1
2
3
2
1
3
2
No Hole Filling! No Mapping!
Initial Population
Timing, Energy
Optimised Population
high
low
GA
12
Advantages

• Optimisation can be based on an arbitrary complex
  fitness function, including
• Timing
• Energy (DVS technique)
• Enlarged search space (TC! different
  schedules)
• Trade-off freedom Synthesis time lt-gt quality
• Easily adaptable to computing clusters
• Multiple populations with immigration scheme

13
Hole Filling Problem
t0
t4
PE0
t2
7
t3
t3
1
t1
d2
d3,4
4
t4
6
t2
4
PE1
t0
t1
Therefore, priorities decide solely upon
execution order!
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Task Mapping

• Why seperation from the list scheduling?
• Regardless of priorties, greedy mapping

P
t0
7
PE0
t1
4
PE1
t
t2
d1,2
5
15
Task Mapping

• Make greedy mapping decision based on
• Timing
• Energy

P
t0
7
PE0
?
t1
4
PE1
?
t
t2
d1,2
5
16
Task Mapping

• Make mapping decision based on
• Timing
• Energy

P
t0
7
PE0
t0
t1
4
PE1
t
t2
d1,2
5
17
Task Mapping

• Make mapping decision based on
• Timing
• Energy

P
t0
7
PE0
t0
?
t1
4
PE1
?
t
t2
d1,2
5
18
Task Mapping

• Make mapping decision based on
• Timing
• Energy

P
t0
7
PE0
t0
t1
4
t2
PE1
t
t2
d1,2
5
19
Task Mapping

• Make mapping decision based on
• Timing
• Energy

P
t0
7
PE0
t0
t1
4
t2
PE1
t
t2
d1,2
5
20
Task Mapping

• Make mapping decision based on
• Timing
• Energy

P
t0
7
PE0
t0
t1
4
t2
t1
PE1
t
t2
d1,2
5
21
Task Mapping

• Make mapping decision based on
• Timing
• Energy

P
t0
7
PE0
t0
t2
t1
4
t1
PE1
t
t2
d1,2
5
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Genetic Mapping Algorithm 8
Task mapping are encoded into mapping strings
task PE
?0 1
?1 0
?2 2
?3 1
?4 1
?5 0
?6 0
Chromosome
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EE-GMA
Including DVS
EE-GLSA
Initial Population
Timing, Energy Area
Optimised Population
high
low
GA
24
Experimental Results

• 4 Benchmark Sets
• 27 generated by TGFF 7
• 8 to 100 tasks Power variations 2.6
• 2 Hou examples taken from 13
• 8 to 20 tasks Power variations 11
• TG1 and TG2 taken from 11
• 60 examples with 30 tasks, each No power
  variations
• Measurement application taken from 3
• 12 tasks No power profile is provided
• Power and time overhead for DVS is neglected
• Average results of 5 optimisation runs

25
Schedule Optimisation
26
Schedule Optimisation
27
Mapping Optimisation
28
Conclusions

• DVS capability can achieve high energy savings in
  distributed embedded systems
• Proposed a new energy-efficient two-step mapping
  and scheduling approach
• Iterative improvement provides high savings / ad
  hoc constructive techniques are not suitable
• Optimisation times are reasonable
• Additional objectives can be easily included
• Consideration of power profile information leads
  to further energy reductions