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Memory Management

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Title: Memory Management


1
Memory Management
From Chapter 4, Modern Operating Systems, Andrew
S. Tanenbaum
2
Memory Management
  • Ideally programmers want memory that is
  • large
  • fast
  • non volatile
  • Memory hierarchy
  • small amount of fast, expensive memory cache
  • some medium-speed, medium price main memory
  • gigabytes of slow, cheap disk storage
  • Memory managers handle the memory hierarchy

3
Basic Memory ManagementMonoprogramming without
Swapping or Paging
  • Three simple ways of organizing memory
  • - an operating system with one user process

4
Multiprogramming with Fixed Partitions
  • Fixed memory partitions
  • separate input queues for each partition
  • single input queue

5
Relocation and Protection
  • Cannot be sure where program will be loaded in
    memory
  • address locations of variables, code routines
    cannot be absolute
  • must keep a program out of other processes
    partitions
  • Use base and limit values
  • address locations added to base value to map to
    physical addr
  • address locations larger than limit value is an
    error
  • Self-relocation
  • Program computes its own references

6
Swapping (1)
  • Memory allocation changes as
  • processes come into memory
  • leave memory
  • Shaded regions are unused memory(global
    fragmentation)

7
Swapping (2)
  • Allocating space for growing data segment
  • Allocating space for growing stack data segment

8
Virtual MemoryPaging (1)
  • The position and function of the MMU

9
Paging (2)
  • The relation betweenvirtual addressesand
    physical memory addresses given bypage table

Frame
10
Page Tables (1)
  • Internal operation of MMU with 16 4 KB pages

11
Page Tables (2)
Second-level page tables
  • 32 bit address with 2 page table fields
  • Two-level page tables

Top-level page table
12
Page Tables (3)
  • Typical page table entry

13
TLBs Translation Lookaside Buffers
  • A TLB to speed up paging

14
Inverted Page Tables
  • Comparison of a traditional page table with an
    inverted page table

15
Page Replacement Algorithms (1)
  • Page fault forces choice
  • which page must be removed
  • make room for incoming page
  • Modified page must first be saved
  • unmodified just overwritten
  • Better not to choose an often used page
  • will probably need to be brought back in soon

16
Page Replacement Algorithms (2)
  • Least Recently Used (LRU)
  • Not Frequently Used (NFU)
  • Aging
  • Working Set
  • WSClock
  • Optimal Page Replacement
  • Replace page needed at the farthest point in
    future
  • Optimal but unrealizable
  • Not Recently Used (NRU)
  • FIFO
  • Second Chance
  • Clock

17
Design Issues for Paging SystemsLocal versus
Global Allocation Policies
  • Global page replacement
  • Original configuration
  • Local page replacement

18
Cleaning Policy (Garbage Collection)
  • Need for a background process, paging daemon
  • periodically inspects state of memory
  • When too few page frames are free
  • selects pages to evict using a replacement
    algorithm

19
Load Control
  • Despite good designs, system may still thrash
    when
  • some processes need more memory
  • but no processes need less
  • Solution Reduce number of processes competing
    for memory
  • swap one or more to disk, divide up pages they
    held
  • reconsider degree of multiprogramming

20
Page Size
  • Small page size
  • Advantages
  • less internal fragmentation
  • better fit for various data structures, code
    sections
  • Disadvantages
  • program needs more pages ?has larger page table

21
Separate Instruction and Data Spaces
  • One address space
  • Separate I and D spaces

22
Shared Pages
  • Two processes sharing same program sharing its
    page table

23
References
  • Chapters 8 and 9 OS Concepts, Silberschatz,
    Galvin, Gagne
  • Chapter 4 Modern Operating Systems, Andrew S.
    Tanenbaum
  • X86 architecture
  • http//en.wikipedia.org/wiki/Memory_segment
  • Memory segment
  • http//en.wikipedia.org/wiki/X86
  • Memory model
  • http//en.wikipedia.org/wiki/Memory_model
  • IA-32 Intel Architecture Software Developers
    Manual, Volume 1 Basic Architecture
  • http//www.intel.com/design/pentium4/manuals/index
    _new.htm
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