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High Performance Power System ????? ???? High Performance Power System

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Title: 1 Author: Last modified by: IBM_USER Created Date: 8/22/2007 10:41:37 AM Document presentation format: (4:3) – PowerPoint PPT presentation

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Title: High Performance Power System ????? ???? High Performance Power System


1
High Performance Power System ????? ???? High
Performance Power System
  • Date. 15/10/2009
  • DongJoon Cho (djcho_at_kr.ibm.com)
  • MTS, GTS, IBM Korea

2
Agenda
  • Concerns about Power System
  • Summary of the solutions
  • Architectures for effective computing
  • H/W Architecture
  • System Architecture
  • S/W Architecture

3
Concerns about Power System
  • ? ??? Server? ????? 100 ??? ?? ????
  • CPU Clock? ????? ? Application ??? ??? ?? ???
  • Clock? 2?? ????? ? ??? 2?? ?? ?? ???
  • Memory? 2?? ????? ? ???? ½? ???? ?? ???
  • IBM Power System? ? ?? System? ?? tpmC? ?? ????
  • IBM Power System? response time? ??? ? ???? ????

S/W? ?? ?? System? ???? ??? ?????
System? ?? CPU Clock ??? ??? ? ?? ????
4
Summary of the solutions
  • ??? ??
  • Firmware update
  • AIX update
  • Software update
  • ??? ??
  • AIX configuration
  • Plan/Selection Hardware
  • System Architecture
  • Software Architecture

???? software ??? ???? ? ????? ?? ???? ???? ????
???
5
Hardware Architecture - CPU
  • CISC
  • Complex Instruction Set Computer Architecture
  • ??? ?? ??? ?? ???? ??
  • VAX, x86
  • EPIC
  • Explicitly Parallel Instruction Computing
    Architecture
  • HP/Intel ?? ??, ??? ?? ??? ??
  • IA64
  • RISC
  • Reduced Instruction Set Computer Architecture
  • ??? ? ??? ?? ?? ???? ?????? ??? ????? ???? ?? ??
    ??? ????? ??? ? ??? ??
  • SPARC, POWER, PA-RISC

6
Hardware Architecture - CPU Instructions
  • Computation Instructions
  • Operands Types

Arithmetic operations Arithmetic operations Logical operations Logical operations
ADD Add AND True if A and B true
SUB Subtract OR True if A or B true
MUL Multiply NOT True if A is false
DIV Divide XOR True if only one of
INC Increment   A and B is true
DEC Decrement SHL Shift bits left
CMP Compare SHR Shift bits right
    BSWAP Reverse byte order
Stack Accumulator Register Memory
Push A Ld A Ld R1, A Add C, B, A
Push B Add B Ld R2, B  
Add St C Add R3, R2, R1  
Pop C   St C, R3  
7
Hardware Architecture - CPU Instructions
  • Data Transfer Instructions

LD Load value from memory to a register
ST Store value from a register to memory
MOV Move value from register to register
CMOV Conditionally move value from register to register if a condition is met
PUSH Push value onto top of stack
POP Pop value from top of stack
8
Hardware Architecture - CPU Instructions
  • Control Flow Instructions
  • Control Flow Relative Frequency

JMP Unconditional jump to another instruction
BR Branch to instruction if condition is met
CALL Call a procedure
RET Return from procedure
INT Software interrupt
Instruction Integer programs Floating-point programs
Branch 75 82
Jump 6 10
Call return 19 8
9
Hardware Architecture - CPU Instructions
  • Common Instructions

Instruction Instruction type Percent of instructions executed Instruction type Overall percentage
Load Data transfer 22 Data transfer 38
Branch Control flow 20 Computation 35
Compare Computation 16 Control flow 22
Store Data transfer 12    
Add Computation 8    
And Computation 6    
Sub Computation 5    
Move Data transfer 4    
Call Control flow 1    
Return Control flow 1    
  Total 95    
10
Hardware Architecture - CPU and I/O
  • CPU Speed versus I/O Speeds
  • Several options to overcome I/O limitations
  • Incorporate more I/O buses (parallelism)
  • Extend current I/O technology (increase
    bandwidth, enhance operating modes)
  • Develop new I/O technology

CPU?? ?? I/O
I/O? ?? wait? ??? ?? ?? ??
11
Hardware Architecture - CPU and I/O
  • CPU Efficiency and CPU Access Costs

I/O? ?? ?? ??
12
Hardware Architecture - I/O
  • The elements of an I/O system

13
Hardware Architecture - I/O InfiniBand
  • Comparing InfiniBand to Existing Technology
  • Differences and Benefits

Change Change Benefit
From To
Memory mapped Channel based CPU efficiency, scalability, isolation, recovery.
Parallel bus Switched fabric Scalability, isolation, redundancy, reduced pin-out, modularity, higher cross-sectional bandwidth.
Shared bus access Point to point Greater distance, higher speeds.
Load/store DMA scheduling Improved CPU efficiency.
Single open address space Independent address domains Protection, isolation, recovery, reliability.
14
Hardware Architecture - I/O InfiniBand
traditional
Switched Fabric Topology
Shared Bus Topology
Shared Bus Architecture
InfiniBand
InfiniBand Switched Architecture
InfiniBand Architecture
15
Hardware Architecture - I/O InfiniBand
Accessing InfiniBand Services - The Channel
Interface Work / Completion Queue Architecture
16
Hardware Architecture - I/O InfiniBand
Queue? ?? wait ???, ??? ??
InfiniBand Queue Operations Operations on the
send queue fall into three subclass
17
Hardware Architecture - I/O InfiniBand
  • VIA (Virtual Interface Architecture)
  • Messages Model
  • Direct, protected access by user level software
    to the communications hardware the protection is
    effected by means of the virtual memory system.

Send and receive packet descriptors that specify
scatter-gather operationsspecifying where data
must be distributed to and collected up fromwhen
sending and receiving A send message queue and a
receive message queue, comprising linked lists of
packet descriptors A means of notifying the
network interface that packets have been placed
on a queue An asynchronous notification process
for the status of the operations requested
(completion of a send or receive operation is
signaled by writing state information into a
packet descriptor) Registration of memory areas
used for communications before communications
are started, the memory areas for each hardware
unit are identified and noted, allowing expensive
operations, such as locking the pages, to be used
and translating from virtual to real addresses to
be done once, outside performance-critical data
transfers
Comparison of VIA and traditional communications
18
Hardware Architecture - I/O InfiniBand
Logical processing steps in TCP/IP
Checksum??, memory ??? ???? overhead ??
White indicates per-message processing it is the
processing load imposed by the system call on the
sockets interface, and is independent of the size
of the message Light gray indicates per-fragment
processing (a long message is broken up into
several fragments) this covers TCP, IP, media
access and interrupt handling Dark grey
indicates per-byte processing (actually, per
fragment plus per byte in fragment) this covers
the data-copying overhead along with computation
of the checksum
19
Hardware Architecture - I/O InfiniBand
  • Mechanisms to reduce the number of interrupts

Operation Simple DMA Improved DMA
Send set up the DMA registers (with buffer address and size) lock the page containing the buffers and purge corresponding addresses in the data cache activate the send command wait until the end of the operation interrupt upon completion of the operation, and free (unlock) the page refill the free buffers with data to be sent lock the buffer page(s) and purge corresponding addresses in the data cache refill a descriptor with the addresses and sizes of the buffers just set up change the descriptor status indicator to "DMA" if the DMA was inactive, wake it up
Receive DMA interrupts processor allocate a page and purge the cache of its addresses set up the DMA registers (with buffer address and size) when the operation completes the DMA will raise an interrupt refill descriptor(s) for receiving purge corresponding addresses in the data cache when a receive operation completes, DMA sets the descriptor indicator to System the OS can test the status of different descriptors if there are no free buffers, the DMA raises an interrupt
??? DMA ???? interrupt ??? ?? overhead? ??
20
System Architecture (Hardware)
  • LPAR / DLPAR

21
System Architecture (Hardware)
  • LPAR / DLPAR
  • Hypervisor

22
System Architecture (Hardware)
  • Micro Partitioning
  • ????? ?? 10?? ??? ??
  • ?? ??? ? ?? ??

23
System Architecture (Hardware)
  • Micro Partitioning

24
System Architecture (Hardware)
  • VIO
  • Part of the Advanced POWER Virtualization feature
  • Allows for sharing of physical devices, including
    storage and network
  • Implemented as a customized AIX-based appliance
  • Requires careful planning to maintain VIO Server
    with minimal impact to VIO
  • Clients
  • Provides command line tools for maintenance or
    can be maintained with NIM

25
System Architecture (System Software)
  • SMT (Simultaneous Multi-Threading)
  • POWER5?? ??? ???? ????? ????? ??? ? ?? ??
    instruction? ??? ? ?? ??
  • ????? ????? thread? ?? ?? ??? ??? ??????? ??? ???
    ?? ?? ? ?? ???? ??? ???? ??
  • WLM (Workload Manager)
  • ???? ???? ??? ???? ???? ???? ?????? ??
  • CPU ???? ??? ?? CPU ??? ???? ????? ?? ???? CPU
    ??? ??
  • CPU ??, ???, ???? ?? ??? ??? ?? ??? ?? ?? ???
    ???????? ??? ????? ??

26
System Architecture (System Software)
  • WPARs (Workload Partitions)
  • A workload partition (WPAR), new with the IBM
    AIX 6.1 operating system, expands on the
    traditional IBM AIX logical partitioning (LPAR)
    technology by further allowing AIX to be
    virtualized within a single operating-system
    image.
  • A simple definition of a WPAR is that it is a
    virtualized AIX instance that runs within a
    single AIX operating-system image.

27
Software Architecture - OS
  • OS? Network Program?? ??
  • Network Program? ????
  • Socket API
  • I/O
  • Multi Connection ??? ?? Process or Thread
  • Process or Thread? ????? ?? IPC(Inter Process
    Communication)

Socket API
I/O
Process Thread
IPC
File System, Memory
OS
H/W (Disk, NIC )
OS? Network Program?? ??
28
Software Architecture File on the Unix
  • What is the File on the Unix?
  • Process? ?? ?? file ??
  • Process? ???? ????? Open?? File
  • 0 ????
  • 1 ????
  • 2 ????

office2_at_root/proc/9804/fdgtls -al total
120 dr-x------ 1 root system 0
Sep 27 0322 . dr-xr-xr-x 1 root system
0 Sep 27 0322 .. lr-xr-xr-x 24 root
system 1024 Sep 22 1848 0 -gt
/ lr-xr-xr-x 24 root system 1024
Sep 22 1848 1 -gt / lr-xr-xr-x 24 root
system 1024 Sep 22 1848 2 -gt
/ --w--w---- 1 root system 12506
Sep 15 1813 7 --w--w---- 1 root system
12506 Sep 15 1813 8 --w--w---- 1 root
system 12506 Sep 15 1813 9
29
Software Architecture
  • Application Programs and OS
  • Type of Software (Conceptual Model)

30
Software Architecture
  • Application Programs and OS
  • Application Programs

31
Software Architecture
  • Application Programs and OS
  • Operating Systems

32
Software Architecture
  • Application Programs and OS
  • Device Drivers

33
Software Architecture
  • Application Programs and OS
  • AIX 5L Structure

34
Application Architecture
Multi-processing?? ?? IPC? kernel overhead? ????
  • Multi-Process Model
  • Process Program? ??? ? ???? Program? ???? ?????
    System??(memory,file,IPC)?? ??
  • Process ?? ? ??
  • fork()
  • Process ??? ??
  • ??? ??? ???? Child Process ??
  • exec()
  • ?? Process? Program? ?? ???? ??
  • ??? Program? Load?? ??

fork()
fork()
Init Process
Process
Process
exec()
exec()
Process A
Process B
35
Application Architecture
  • Multi-Processing Model
  • Socket Program

Server
Client
socket
bind
listen
socket
????
connect
accept
??? ??
fork()
write
read
??? ??
write
read
close
36
Application Architecture
  • Multi-Processing Model

fork() ? connecting Client to Server ?
fork() ??? ?? ??? fork()? ????.
Server App
Client App
1
Client App
Server App
Server App
Client App
Server App
2
Server App
Client App

process Pool ? fork() ? connecting Client to
Server fork() ??? ?? ???? pool? ?? fork()? ??
child processes? ??? ???.
Client App
1
2
Client App
Server App
Server App
Client App
Server App
Server App
Client App
37
Application Architecture
  • IPC (Inter Process Communication)
  • What is IPC?
  • Process?? data? ???? ????? ?? ???? ??
  • IPC ??
  • Semaphore
  • ????? ????? ???? ????? ??
  • Shared Memory
  • ???????? ?????? ??, ??? ??? ?? ?? ?? ??
  • Message Queues
  • queue ? ????? ?????, ?? ??? ??? ?? ??? ??
  • ????? IPC??? ??? ?? ????? ??? ????? ?? ????? ??
  • ????? ??? ????.

38
Application Architecture
  • IPC
  • IPC ??
  • Pipe
  • ????? ???? ?? ?????? ??? ?? ???? ??. ???? ???????
    ??? ???(??? ??? ??, ??? ?? ??? ??? ??.- Read only
    or Write only), ??? ???(PPID? ??) ??? process
    ????? ????? ??
  • FIFO (Named Pipe)
  • ???? I/O STREAM ????? Pipe? ???? ??? ??? ????
    Process ??? ??? ????? Pipe? ???
  • mknod? ???? FIFO? ??
  • UDS (Unix Domain Socket)
  • socket API? ???? ??????, port ??? Internet Domain
    Socket? ??? ?? ???? ?????? ???? ???????? ??? ??
    ????.

39
Application Architecture
  • IPC
  • IPC commands
  • lpcs comnand
  • ipcs -m ( shared memory )
  • ipcs -q ( message gueues )
  • ipcs -s ( semaphore )
  • lpcrm comnand
  • ????, ????,???????? ????? ??

??    ????    ????    ?????
   1.IPC????    msgget    semget    shmget
   2.IPC????    msgctl    semctl    shmctl
     (????,??)
   3.IPC????    msgsnd    semop    shmat
     (send/receive)    msgrcv        shmdt
40
Application Architecture
  • IPC
  • IPC Limits

Semaphores 4.3.0 4.3.1 4.3.2 5.1 5.2 5.3
Maximum number of semaphore IDs for 32-bit kernel 4096 4096 131072 131072 131072 131072
Maximum number of semaphore IDs for 64-bit kernel 4096 4096 131072 131072 131072 1048576
Maximum semaphores per semaphore ID 65535 65535 65535 65535 65535 65535
Maximum operations per semop call 1024 1024 1024 1024 1024 1024
Maximum undo entries per process 1024 1024 1024 1024 1024 1024
Size in bytes of undo structure 8208 8208 8208 8208 8208 8208
Semaphore maximum value 32767 32767 32767 32767 32767 32767
Adjust on exit maximum value 16384 16384 16384 16384 16384 16384
41
Application Architecture
  • IPC
  • IPC Limits

Message Queue 4.3.0 4.3.1 4.3.2 5.1 5.2 5.3
Maximum message size 4 MB 4 MB 4 MB 4 MB 4 MB 4 MB
Maximum bytes on queue 4 MB 4 MB 4 MB 4 MB 4 MB 4 MB
Maximum number of message queue IDs for 32-bit kernel 4096 4096 131072 131072 131072 131072
Maximum number of message queue IDs for 64-bit kernel 4096 4096 131072 131072 131072 1048576
Maximum messages per queue ID 524288 524288 524288 524288 524288 524288



42
Application Architecture
  • IPC
  • IPC Limits

Shared Memory 4.3.0 4.3.1 4.3.2 5.1 5.2 5.3
Maximum segment size (32-bit process) 256 MB 2 GB 2 GB 2 GB 2 GB 2 GB
Maximum segment size (64-bit process) for 32-bit kernel 256 MB 2 GB 2 GB 64 GB 1 TB 1 TB
Maximum segment size (64-bit process) for 64-bit kernel 256 MB 2 GB 2 GB 64 GB 1 TB 32 TB
Minimum segment size 1 1 1 1 1 1
Maximum number of shared memory IDs (32-bit kernel) 4096 4096 131072 131072 131072 131072
Maximum number of shared memory IDs (64-bit kernel) 4096 4096 131072 131072 131072 1048576
Maximum number of segments per process (32-bit process) 11 11 11 11 11 11
Maximum number of segments per process (64-bit process) 268435456 268435456 268435456 268435456 268435456 268435456
43
Application Architecture
  • IPC
  • IPC tunable parameters
  • msgmax
  • msgmnb

Purpose Specifies maximum message size.
Values Dynamic with maximum value of 4 MB
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
Purpose Specifies maximum number of bytes on queue.
Values Dynamic with maximum value of 4 MB
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
44
Application Architecture
  • IPC
  • IPC tunable parameters
  • msgmni
  • msgmnm

Purpose Specifies maximum number of message queue IDs.
Values Dynamic with maximum value of 131072
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
Purpose Specifies maximum number of messages per queue.
Values Dynamic with maximum value of 524288
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
45
Application Architecture
  • IPC
  • IPC tunable parameters
  • semaem
  • semmni

Purpose Specifies maximum value for adjustment on exit.
Values Dynamic with maximum value of 16384
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
Purpose Specifies maximum number of semaphore IDs.
Values Dynamic with maximum value of 131072
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
46
Application Architecture
  • IPC
  • IPC tunable parameters
  • semmsl
  • semopm

Purpose Specifies maximum number of semaphores per ID.
Values Dynamic with maximum value of 65535
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
Purpose Specifies maximum number of operations per semop() call.
Values Dynamic with maximum value of 1024
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
47
Application Architecture
  • IPC
  • IPC tunable parameters
  • semume
  • semvmx

Purpose Specifies maximum number of undo entries per process.
Values Dynamic with maximum value of 1024
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
Purpose Specifies maximum value of a semaphore.
Values Dynamic with maximum value of 32767
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
48
Application Architecture
  • IPC
  • IPC tunable parameters
  • shmmax
  • shmmin

Purpose Specifies maximum shared memory segment size.
Values Dynamic with maximum value of 256 MB for 32-bit processes and 0x80000000u for 64-bit
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
Purpose Specifies minimum shared-memory-segment size.
Values Dynamic with minimum value of 1
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
49
Application Architecture
  • IPC
  • IPC tunable parameters
  • shmmni

Purpose Specifies maximum number of shared memory IDs.
Values Dynamic with maximum value of 131072
Display N/A
Change N/A
Diagnosis N/A
Tuning Does not require tuning because it is dynamically adjusted as needed by the kernel.
50
Application Architecture
  • Multi-Thread Model
  • Thread Process ??? ???? ?? ??
  • Socket Program

Server
Client
socket
bind
socket
listen
????
pthread_create()
connect
accept
??? ??
read
write
??? ??
read
write
close
51
Application Architecture
  • Multi-Thread Model

pthread_create() ? connecting Client to Server ?
pthread_create() ??? ?? ??? pthread_create()?
?????, fork()??? ?? ???.
Server App
Client App
1
Client App
Thread
Thread
Client App
Thread
2
Thread
Client App

Thread Pool ? pthread_create() ? connecting
Client to Server fork() ??? ???? thread ???? ???
??? ?? pool? ??.
Client App
1
2
Client App
Thread
Thread
Client App
Thread
Thread
Client App
52
Application Architecture
  • NN DB Connection (Multi-Process Model)

DB Connection? nn?? ?????? Oracle? fork()? ??
system resource? ??
Oracle
Process
Connection nn
Child process
Child process
Child process
Child process
fork()
Child process
Child process
fork()
Child process
Child process
Child process
Child process
Child process
Child process
.
.
.
  • DB Query? ?? ? load
  • DB Connect (from network)
  • DB Query ??

53
Application Architecture
  • 11 DB Connection (Multi-Process Model)

DB Connection? 11? oracle? fork()? 1?? ????
system resource ??? ??? client? ??? ???? ?? ? ??
Oracle
Process
Connection 11
Child process
Child process
Child process
fork()
Child process
fork()
Child process
Child process
Child process
.
  • DB Query? ?? ? load
  • DB Connect (from network)
  • DB Query ??

54
Application Architecture
  • DB Connection Pool (Multi-Process Model)
  • Thread Pool or Process Pool

Pool ?? ?? ???? Connection?? ??, Pool? ??? ????
???, ??? ? Pool? ??? ????? ?? ??
Oracle
Process
Connection Pool
Child process
Child process
Thread
Child process
Child process
fork()
Thread
Child process
Child process
fork()
Child process
Child process
Thread
Child process
Thread
Child process
.
  • DB Query? ?? ? load
  • DB Connect (from network)
  • DB Query ??

Connection nn
55
Application Architecture
  • DB Connection Pool (Multi-Thread Model)

Pre-Process Model (Process Pool) Pre-Thread Model
(Thread Pool)
  • Multi Treading Model (?, ?)
  • Thread Pool Model for DB Connection (?, ?, ?, ?)

Server App
Client App
Oracle
Client App
Thread
3
4
Thread
Client App
Child process
5
Thread
Child process
Client App
Thread

Child process
6
Child process
1
2
Thread
Thread
Thread
Thread
56
Application Architecture
  • I/O Multiplexing Model
  • Socket? ??? socket I/O? ???? ???? ?? ??? socket
    I/O? ??? ???? ???? Socket? file descriptor table?
    ??? ? file descriptor table? I/O? ???? ?? ??? ??
  • select / poll

File descriptor ??
????
Server
Client
File descriptor ??
data ???
Server
Client
File descriptor ??
????
Server
Client
57
Application Architecture
  • I/O Multiplexing Model
  • ??
  • I/O Multiplexing? ?? selec / poll? ????? ?? ???
    file descriptor array ?? ?? file descriptor??
    event? ?????? ??? loop? ?? ???? ?

File descriptor table
??? File descriptor
?? File descriptor? ???? ?
I/O Multiplexing Model? ??
58
Application Architecture
  • Event based I/O Model through Real-time Signal
  • Event ??? socket ?? ??
  • UNIX/Linux POSIX Real-time Signal, epoll
  • Windows, AIX, iSeries OS IOCP
  • FreedBSD kqueue (kernel queue)

59
Application Architecture
  • Event based I/O Model through Real-time Signal
  • Real-time Signal
  • ???? ???? ?? Signal? ??? ???? ??? ??? ???? ?? ???
    ??
  • Real-time Signal? ???? ????, ???? ???? event? ???
    ? ?? signal? ??? ?? ? ??.
  • ??, real-time signal? ???? socket? descriptor ??
    ?? ??? ????, ???? ??? ??? ? ??.
  • select / poll ? ?? file descriptor table?
    descriptor array? ??? ??? ??.

SIGRTMIN1
Socket1
Thread1
Client1
Thread-pool? ???? Real-time signal? thread? ?? ??
SIGRTMIN2
Socket2
Thread2
Client2
SIGRTMIN3
Socket3
Thread3
Client3
60
Applicatoin Architecture
  • epoll
  • epoll event poll
  • Real-time Signal ?? ? 10 20? ?? ??
  • HP-UX, Redhat ??, AIX ???
  • Event poll? ?? ???? ??? read/write event? ???? ??
    ??? return??. Return ?? ??? descriptor? ?? ???
    poll? ?? loop? ?? ??? ??? ??.

Socket1
Event poll
Socket2
File descriptor
Socket3
61
Application Architecture
  • epoll
  • httpd test result

dphttpd symmetric multiprocessor result
dphttpd uniprocessor result
62
Application Architecture
  • epoll
  • Pipetest

Pipetest symmetric multiprocessor result
Pipetest uniprocessor result
63
Application Architecture
  • epoll
  • Dead connecton test

128bytes context ,Dead connections test result
1024ytes context ,Dead connections test result
64
Application Architecture
  • IOCP (I/O Completion Ports)
  • IOCP on iSeries
  • AS/400?? ??, i? 1988? AS/400?? ??, AS/400,
    OS/400, i5/OS, i6/OS? ??
  • AS/400 QMU 5.0.1.02 introduces asynchronous I/O
    completion ports (IOCP)
  • IOCP on Windows NT
  • Windows NT Winsock2?? ??
  • IOCP on AIX
  • I/O completion port support was first introduced
    in AIX 4.3 by APAR IY06351. An I/O completion
    port was originally a Windows NT scheduling
    construct that has since been implemented in
    other OS's. Domino uses these constructs to
    improve the scalability of the server. It allows
    one thread to handle multiple session requests,
    so that a Notes client session is no longer bound
    to a single thread for its duration. The
    completion port is tied directly to a device
    handle and any network I/O requests that are made
    to that handle.

65
Application Architecture
  • Parallel Programming
  • Fundamental of Parallel Programming
  • Multi-Process/Multi-Thread
  • Asynchronous Procedure Calls
  • Signal, Event
  • Queuing Asynchronous Procedure Calls
  • IOCP

Ex) File Finder Agent
66
Application Architecture
  • Parallel Programming OpenMP(Open
    Multi-Processing)
  • An Application Program Interface (API) that may
    be used to explicitly direct multi-threaded,
    shared memory parallelism
  • Comprised of three primary API components
  • Compiler Directives
  • Runtime Library Routines
  • Environment Variables
  • Portable
  • Standardized

67
Application Architecture
  • Parallel Programming - MPI
  • MPI (Message Passing Interface)
  • Message Passing Parallel Programming? ?? Standard
    Data Communication Library
  • References
  • http//www.mcs.anl.gov/mpi/index.html
  • http//www.mpi-forum.org/docs/docs.html
  • MPI ??
  • ??? (portability)
  • ??? (efficiency)
  • ??? (functionality)

68
Application Architecture
  • Parallel Programming
  • MPI ?? ??
  • Process ???? ?? ??
  • Processor Process 11 or 1N
  • Message data envelope
  • ?? process? ?????
  • ??? ?? data? ?????
  • ?? data? ?????
  • ??? ?????
  • ?? process? ????
  • ??? ??? ????
  • ??? ?? ??? ?? ????
  • Tag
  • Message matching? ??? ??
  • ???? ??? ??? ??? ? ??
  • ??? ?? ?? ??
  • Communicator
  • ???? ??? ???? ?????? ??

69
Application Architecture
  • Parallel Programming
  • MPI ?? ??
  • Process Rank
  • ??? communicator ?? process?? ???? ?? ???
  • Point to Point Communication
  • ? ? process ??? ??
  • ??? ?? process? ??? ?? process? ??
  • Collective communication
  • ??? ?? ?? process? ??
  • 1N, N1, NN ?? ??
  • ?? ?? P2P Communication ??? ??? Collective
    Communication?? ??
  • ?? ??? ??, ???? ??

70
Application Architecture
  • Java
  • Development and execution of Java applications

71
Application Architecture
  • Java
  • Java application? ???? System? ????? ???? ??
  • NIO (New I/O)
  • NIO pollset
  • Garbage collector? ???? collect??? ?? ?
  • ??? ??? ??? JRE? ???? update? ?
  • ??? source code? ???? ??? ? (Deprecated? ??? API?
    ??? ?? API? ???? ??)
  • Framework? ????? framework? ???? ??? ?

??? ???
JRE? Framework? ?? ??? ?? ?? ??
72
Application Architecture
  • Java
  • pollset
  • Java Source code
  • DatagramChannel channel DatagramChannel.open()
  • Channel configureBlocking(false)
  • Selector selector Selector.open()
  • Channel.register(selector, SelectKey.OP_READ)
  • Channel.register(selector, SelectKey.OP_READ)
  • int poll(struct pollfd fds, nfds_t nfds, int
    timeout)
  • Native pollset interface C source code
  • pollset_t ps pollset_create(int maxfd)
  • int rc pollset_destory(pollset_t ps)
  • int rc pollset_ctl(pollset_t ps, struct
    poll_ctl pollctl_array, int array_length)
  • int nfound pollset_poll(pollset_t ps, struct
    pollfd polldata_array, int array_length,
  • int timeout)

73
Application Architecture
  • Java
  • pollset
  • Traditional poll method

74
Application Architecture
  • Java
  • pollset
  • pollset method

75
Application Architecture
  • Java
  • pollset
  • pollcache internal
  • pollcache control block

76
Application Architecture
  • Java
  • pollset
  • pollset() bulky update

77
Application Architecture
  • Java
  • pollset
  • The throughput performance two drivers(with
    poll() and with pollset())
  • pollset driver?? poll driver?? 13.3 ?? ??

78
Application Architecture
  • Java
  • pollset
  • Time spent on CPU

79
AIX I/O Model
  • select / poll
  • pollset
  • event
  • Real-time Signal
  • AIO
  • IOCP

80
AIX IOCP
  • IOCP
  • I/O completion port support was first introduced
    in AIX 4.3 by APAR IY06351. An I/O completion
    port was originally a Windows NT scheduling
    construct that has since been implemented in
    other OS's.

81
AIX IOCP
  • IOCP
  • Synchronous I/O versus asynchronous I/O

82
AIX IOCP
  • IOCP
  • IOCP Operation

83
AIX IOCP
  • IOCP
  • CreateIoCompletionPort Function

lt IOCP on AIX gt include ltiocp.hgt int
CreateIoCompletionPort (FileDescriptor,
CompletionPort, CompletionKey, ConcurrentThreads)
HANDLE FileDescriptor, CompletionPort DWORD
CompletionKey, ConcurrentThreads
lt IOCP on Windows gt HANDLE CreateIoCompletionPort
( HANDLE FileHandle, // handle
to file (socket) HANDLE ExistingCompletionPort,
// handle to I/O completion port ULONG_PTR
CompletionKey, // completion key DWORD
NumberOfConcurrentThreads // number of threads
to execute concurrently )
84
AIX IOCP
  • IOCP
  • How to configure IOCP on AIX
  • fileset bos.iocp.rte

lslpp -l bos.iocp.rteThe output from the lslpp
command should be similar to the following
Fileset Level State
Description -----------------------------------
----------------------------------------- Path
/usr/lib/objrepos bos.iocp.rte
5.3.9.0 APPLIED I/O Completion Ports
API Path /etc/objrepos bos.iocp.rte
5.3.0.50 COMMITTED I/O Completion Ports API
office2_at_root/gtlsdev -Cciocp iocp0 Available I/O
Completion Ports
office2_at_root/gtlsattr -Eliocp0 autoconfig
available STATE to be configured at system
restart True
85
AIX IOCP
  • IOCP
  • How to configure IOCP on AIX

86
AIX IOCP
  • IOCP
  • How to configure IOCP on AIX

87
AIX IOCP
  • IOCP
  • How to configure IOCP on AIX

88
AIX IOCP
  • IOCP
  • How to configure IOCP on AIX

89
AIX IOCP
  • IOCP
  • How to configure IOCP on AIX

90
AIX IOCP
  • IOCP API
  • CreateCompletionPort
  • GetMultipleCompletionStatus
  • GetQueuedCompletionStatus
  • PostQueuedCompletionStatus
  • ReadFile
  • WriteFile

91
iSeries IOCP
  • IOCP API
  • QsoStartAccept
  • QsoCreateIOCompletionPort
  • QsoDestroyIOCompletionPort
  • QsoPostIOCompletion
  • QsoStartRecv
  • QsoStartSend
  • QsoCancelOperation
  • QsoWaitForIOCompletion

92
Windows IOCP
  • IOCP API
  • CreateIoCompletionPort
  • GetQueuedCompletionStatus
  • GetQueuedCompletionStatusEx
  • PostQueuedCompletionStatus
  • ReadFileEx
  • WriteFileEx
  • Kernel Functions
  • NtCreateIoCompletion, NtRemoveIoCompletion
  • KeInitializeQueue, KeRemoveQueue
  • KeInsertQueue
  • KeWaitForSingleObject
  • KeDelayExecutionThread
  • KiActivateWaiterQueue
  • KiUnwaitThread
  • NtSetIoCompletion

93
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