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Software-Hardware Cooperative Power Management Technique for Main Memory

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Title: Cooperative Software-Hardware Power Management Technique for Main Memory Author: Hai Huang Last modified by: xiaoyu jia Created Date: 11/28/2004 6:53:26 AM – PowerPoint PPT presentation

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Title: Software-Hardware Cooperative Power Management Technique for Main Memory


1
Software-Hardware Cooperative Power Management
Technique for Main Memory
  • Hai Huang, Kang G. Shin
  • University of Michigan
  • Charles Lefurgy, Karthick Rajamani, Tom Keller,
    Eric Van Hensbergen, Freeman Rawson
  • IBM Austin Research Lab

2
Motivation
  • High power dissipation causes a lot problems for
    many computing systems, especially for large
    servers
  • High electric and cooling cost
  • Unreliable electronic components
  • Low rack-density
  • Intelligent management of system power is
    important to ensure these systems can continue to
    function

3
DRAM A Power Hog
  • Main memory (DRAM) consumes a significant portion
    of the total power which makes it a good
    candidate to optimize power for
  • E.g., in an IBM mid-range eServer system, around
    40 of the total power is consumed by the main
    memory

4
Outline
  • Motivation
  • Background
  • Previous Work
  • A Cooperative Approach
  • Results
  • Conclusion

5
Outline
  • Motivation
  • Background
  • Previous Work
  • A Cooperative Approach
  • Results
  • Conclusion

6
Background
  • DRAM dissipates power continuously
  • Self-refresh, row/column decoders, amplifiers,
    data queue, etc.
  • DRAMs power management capabilities
  • Multiple power states
  • Memory controller is used to implement a simple
    interface to transition between these states
  • Transitions have non-negligible delays
  • Trade-offs between power and performance

7
Example DDR
Example Registered 512MB DDR module w/8 devices
per rank
8
Outline
  • Motivation
  • Background
  • Previous Work
  • Software Techniques
  • Hardware Techniques
  • A Cooperative Approach
  • Results
  • Conclusion

9
Software Technique
Process i uses ranks 0 and 2 Process j uses
rank 3
  • OS can track each process virtual-to-physical
    memory mappings

10
Hardware Technique
  • Allows for much finer-grained control of power
  • Monitors each memory access
  • Predicts when to transition to lower power modes

11
Hardware Technique Problems
  • Hardware techniques can be easily confused by
    constant context-switching
  • Different processes would have different memory
    access behavior, and it takes time for the memory
    controller to adapt, readapt, readapt

- Imagine hundreds of parallel processes instead
of 2! - context switching interval 1 msec
12
Outline
  • Motivation
  • Background
  • Previous Work
  • A Cooperative Approach
  • Results
  • Conclusion

13
Cooperative Approach
  • Improve the hardware technique so we dont have
    to readapt, readapt, readapt
  • Need system software cooperation
  • Make the hardware understand the notion of
    processes
  • At each context switch, OS sends a signal to the
    memory controller
  • Upon receiving this signal, the memory controller
    saves and restores its internal registers, which
    are used for keeping past memory access patterns
  • Essentially, we can now manage power for the
    current process solely depending on this and only
    this process past memory accesses

14
Context-Aware Memory Controller
15
Cooperative Technique Per-Process
time
16
Outline
  • Motivation
  • Background
  • Previous Work
  • A Cooperative Approach
  • Results
  • Conclusion

17
Experimental Setup
  • Mambo
  • A full-machine simulator to run various workloads
    and collect memory traces
  • Memsim
  • Trace-driven simulator that produces performance
    and power results for the main memory
  • Workloads
  • SPECjbb bzip2 crafty (low memory-intensive)
  • SPECjbb art mcf (high memory-intensive)

18
Results
Low-memory intensive workload
High-memory intensive workload
19
Conclusion
  • Cooperative technique
  • Uses 7275 less power than when no power
    management is applied, with 1114 slow-down in
    average response time
  • Uses 1417 less power than the hardware
    technique
  • Uses 1626 less power than the software
    technique
  • Has a comparable performance to HW and SW
    techniques
  • Future Work
  • Communicate hints directly from user processes to
    the hardware
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