University of Manchester: Progress on LNA Programme

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University of ManchesterProgress on LNA
Programme

• B. Boudjelida, A. Sobih, A. Bouloukou, S. Arshad,
  S. Boulay, J. Sly and M. Missous
• School of Electrical and Electronic Engineering
• University of Manchester

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OUTLINE

• Introduction
• LNA Elements
• Modelling (pHEMTs and passives)
• Noise measurements
• LNA Results
• MMIC using InP (RF noise)
• MIC using off-the shelves components (AVAGO
  NEC transistors)
• Noise predictions for next LNA
• Conclusions

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Workflow at University of Manchester
Introduction
LNA building blocks library
Process set-up
LNA circuit design
LNA layout design
LNA Fabrication!
LNA Measurement
LNA testing
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LNA Elements
Modelling passives and pHEMTS
4 x 200 µm (XMBE109-Run1)
Vp -1.3 eV Gm 300 mS/mm Ft 30 GHz Fmax 35
GHz
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LNA Elements
InGaAs/InAlAs pHEMTs Noise Measurements
? VDS1V NF50 1dB (lower for
higher current)
? Lowest NF for lower VDS WHY?
? Gate leakage due to impact ionization!
For better noise, the devices MUST be biased at
low VDS ? good for power dissipation!
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LNA Elements
InGaAs/InAlAs pHEMTs Noise Measurements Independen
t Lab MC2 (spin-off IEMN Lille)
VDS1V 10IDSS

• Extraction of the noise parameters relies on the
  equivalent circuit.
• NFmin 0.5 dB _at_ 1GHz

XMBE109 4x200 µm device Minimum noise figure
extracted from the F50 method.
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LNA Elements
InGaAs/InAlAs pHEMTs Noise Measurements Independen
t Lab MC2 (spin-off IEMN Lille)
VDS1V 10IDSS

• Measurement independent of the equivalent
  circuit!
• Expensive requires accurate tuners.
• NFmin 0.05 dB _at_ 1GHz !!

• This method is believed to give more accurate
  results BUT the true NFmin is likely to lie
  between the 2 measurement methods.
• ? NFmin 0.2 dB _at_ 1GHz

XMBE109 4x200 µm device Minimum noise figure
measured using the multi-impedance method (tuner).
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LNA Results
InP MMIC design, fabrication and measurement
Transistor biased at 20 IDSS (VD 1V ID40 mA)
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LNA Results
InP MMIC RF and Noise results
Discrepancies with noise highly likely to be due
to NiCr resistors process
Could also be due to measurement issues (no
decoupling probes for DC feed)
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LNA Results
MIC design, fabrication and measurement

• Goals
• Demonstrate the validity of the model predictions
• Easy-to-assemble using commercial off the
  shelves components
• Could be used for demonstrators such as 2PAD

NEC transistors, Double-stage circuit, optimised
for 0.4-2 GHz operation
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LNA Results
MIC design, fabrication and measurement
8 different LNAs designed using NEC and Avago
transistors
Single and double-stage circuits being measured
now!

• Very good noise predictions!
• NF lt 0.6 dB !

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LNA Results
InP MMIC predictions
LNA circuit
Comments
Input bias and impedance match off-chip
L series resistances used for drain biasing
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LNA Results
InP MMIC predictions
NFlt 0.35 dB from 0.3 to 1.6 GHz
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Conclusions

• Super low noise InGaAs/InAlAs pHEMTs technology
  demonstrated
• NFmin lt 0.2 dB _at_ 1GHz using the 1 µm gate
  geometry

• The first full MMIC LNA successfully modelled,
  fabricated and tested

MMIC

• Still very good agreement between measurement
  and models using the equivalent circuit models

• The measured NF in the 50O system is also higher
  than what predicted by the simulations ? due to
  Resistors (under investigation, 2nd MMIC run
  under way)

• The first fabricated MICs yield measured NF as
  low as 0.6 dB (42K)

MIC

• Noise predictions demonstrated

Next LNA expected to go below 0.35 dB (25K) at RT
in a 50O system between 0.3 to 1.6 GHz