Lecture 19 MOS Amplifier Design

1
Lecture 19MOS Amplifier Design

• Comparison of MOS and bipolar amps
• Current sources
• MOS single stage amplifiers
• Various amplifier types
• Summary

• Michael L. Bushnell
• CAIP Center and WINLAB
• ECE Dept., Rutgers U., Piscataway, NJ

2
Discrete Component Audio Amp
3
Typical CMOS OPAMP
4
MOS Vs. Bipolar Amps
MOS Lower transconductance Higher differential
offsets in differential amps Infinite input
impedance Zero offset as switch Stores signal
voltage on monolithic C senses continuously and
non-destructively On-chip sample hold
Bipolar Finite input impedance Cannot do
that
5
MOS Single Stage Amplifiers
6
Source-Coupled Pair

• Fig 3.50
• Assume identical devices, neglect body effect
  O/P resistance

7
Equations
Cox W 2L

• Id1 mn (Vgs1 Vt)2
• ID2 mn (Vgs2 Vt)2
• DVi Vi1 Vi2
• Id common mode current
• DId differential current
• Solve quadratic to get
• DId mn (DVi)

Cox W 2L
Cox W 2L
2 Iss mn (Cox W / 2L)
- (DVi)2
8
Concluding Equations

• Id Id1 Id2
• 2
• DId Id1 Id2
• Correct only if both transistors saturated
• DV
• Limiting input behavior when an input exceeds a
  value
• Excursion causing cutoff -- function of device
  size, bias current
• Behaves like bipolar emitter coupled pair with
  degeneration resistors
• Select to give desired I/P voltage range

ISS mn (Cox W / 2L)

9
Differential I/P Voltage to Turn Off One
Transistor

• 2 (Vgs Vt) value when balanced
• Increase input range by
• Increasing bias current
• Increasing L
• Decreasing W
• Usually operate with (Vgs Vt) at several
  hundred mV

10
Differential Output Current Vs. Differential
Input Voltage

• Fig 3.51

11
Transconductance
d DId d DVi
)

(

• Gm
• Gm Iss (mn Cox W / L) gm1 gm2
• NOT independent of device size, as in bipolar case

DVi 0
(
d DId mn Cox W 2 Iss
- DVi2 d DVi 2L
mn (Cox W / 2L)
(
)
)

(
)
- mn Cox W DVi2
2L 2Iss -
(DVi)2 mn (Cox W
/ 2L))
(
)



12
Input Offset Voltages

• Due to mismatches in
• Load resistor value
• Transistor W/L ratios
• Vts
• VOS VGS1 - VGS2
• Vt1 2 ID1
• mn Cox (W/L)1
• -- Vt2 2 ID2
• mn Cox (W/L)2

(
)
(
)
13
Circuit of Input Offset Coupled Pair

• Fig 12.4 (old book)

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Equations

• DID ID1 ID2
• ID ID1 ID2
• 2
• D (W/L) (W/L)1 - (W/L)2
• W/L (W/L)1 (W/L)2
• 2
• DVt Vt1 Vt2
• Vt Vt1 Vt2
• 2
• DRL RL1 RL2
• RL RL1 RL2
• 2

15
Differential Input Parameters

• VOS Differential input V needed to make
  differential output V
• exactly 0
• ID1 RL1 ID2 RL2
• Substitute, neglect higher-order terms, get
• VOS DVt (VGS Vt) - DRL D (W/L)
• 2
  RL (W/L)
• MOS Offset scales directly with VGS Vt
• Bipolar Mismatch terms multiplied by kT/q,
  usually smaller than VGS Vt
• MOS has higher VOS for same mismatch or process
  gradient
• Mismatch because ratio of bias current to
  transconductance much lower than for bipolar

(
(
)
)

16
Offset Improvement

• Operate MOS amp at low VGS
• I/gm affects slew rate for class A input stage
  transient performance needs will limit I/gm as
  well
• New mismatch peculiar only to MOS
• Vt mismatch gives a constant offset that is bias
  current independent
• Strong function of process cleanliness
• Large centroid (common centroid) structures get
  Vt mismatch distributions with s 2 mV

17
MOSFET Current Sources

• Ratio of reference current to output current set
  by device W/L ratios
• Most accurate ratioing when devices have same L,
  but different Ws
• L varies substantially due to etching variations
• Important parameters
• Small-signal output resistance r0
• Voltage range over which output resistance is
  maintained
• Matching of current sources

18
Equivalent Open-Circuit Voltage VThev ID-Source
Value
(
)
(
-1
-1
)

• r0 ID Leff d Cd
• VDS ID d VDS
• VThev r0 ID 1 d Cd VA
  1
• Leff d VDS
  l
• Derivative is f (substrate doping, tox, gate
  voltage)
• Given a process and (VGS Vt), it is constant,
  so L determines r0

(
-1
)



19
Bob Widlar Current Source

• Fig 4.4

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Behavior

• M2 stays in saturation as long as VGD lt - Vt
• Happens as long as VDS gt VDSsat (VGS Vt)
• If not true, transistor enters linear (triode)
  region

21
Current Source Behavior

• Fig 4.5

22
Cascode Current Sources

• Fig 12.6a (old book)

23
Current Source Behavior

• Fig 12.6 b (old b ook)

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Transistor Behavior

• Often need higher r0 values VThev to improve
  amplifier voltage gain with higher r0
• Cascode current source can achieve this
• M2 shields M1 from voltage variations at O/P
  terminal
• R0 r02 (1 gm2 r01)
  (12.29)
• Increases r0, VThev by (1 gm2 r01) factor
• Get VThev of several thousand V

25
Small-Signal Equivalent Circuit of Cascode
Current Source

• Fig 12.7 (old b ook)

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Accounting for Body Effect

• ix is test current source
• ix flows in r01, so Vsb2 ix r01
• vgs for dependent sources is ix r01,
• vx S voltages across r01 r02
• ix r01 r02 (ix gm2 (ix r01) gmb2
  (ix r01))
• vx R0 r01 1 (gm2 gmb2) r02 r02
• ix
  r01
• R0 r02 (1 (gm2 gmb2) r01) r01
• Body effect of M2 slightly increases R0

)
(


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Bipolar Vs. MOS Current Source

• Bipolar current source cannot get R0 gt b0 r0
• 
  2
• Due to base current in cascode transistor
• MOS can get arbitrarily high impedances with
  more stacked cascode devices

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Double Cascode Current Source

• Fig 4.10

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Cascode Current Source Problems

• Serious drawback of stacked devices
• Range of voltage swing at output node where both
  transistors are saturated is smaller than for
  simple current source
• Minimum V across current source to saturate both
  devices
• (Vt 2 VDSSat)
• Make VDSSat small
• Use large W values in M1 M2
• Bias transistors at low current
• However, Vt represents significant loss of
  voltage swing

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Refined Wilson Current Source

• Fig 12.9a (old book)

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Method

• Bias M1 at edge of saturation (EOS) with drain
  one Vt more negative than gate
• Use voltage level shifting device

32
Alternate Method

• Use source follower M5 to provide voltage drop
• Fig 12.9b (old book)

33
Method

• Reduce W/L of M4 by a factor of 4 to compensate
  for (VGS Vt) of M5
• Now, need only have 2 VDSSat to saturate both
  devices
• However, MOSFETs have indistinct transitions from
  triode to saturation regions
• Must increase M1 drain voltage several hundred mV
  to get desired R0 (Eqn. 12.29)

34
Wilson Current Source

• Use negative feedback in M3 to increase output
  resistance R0 by nearly same amount as the
  cascode source
• Fig 4.15

35
Mathematics

• For large Vt, drain of M3 is higher than drain of
  M2 by gt 1 V
• Gives a large drain current mismatch between M2
  M3 due to finite device output resistance
• Therefore, need M4 as follows to equalize drain
  voltages

36
Transistor Mismatch Effects

• Mismatch in transistor pairs in current sources
• Determines offset voltage of differential
  amplifiers with current source loads
• Limits accuracy of digital-analog converters
  (DACs)
• Fig 4.52

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Assume Mismatched Transistors
(W/L)1

• ID1 mn Cox (VGS Vt1)2
• 2
• ID2 mn Cox (VGS Vt2)2
• 2
• Using average and difference equations
• ID ID1 ID2 DID ID1 ID2
• 2
• W (W/L)1 (W/L)2
• L 2
• DW W W
• L L L
• Vt Vt1 Vt2 DVt Vt1 Vt2
• 2

(W/L)2

)
(
)
(
-

2
1
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Mismatch Results

• Leads to DID - 2 DVt
• I (VGS Vt)
• Mismatch components
• Geometry dependent, fractional current mismatch
  independent of bias
• Dependent on Vt mismatch, increases as (VGS Vt)
  reduces
• Fixed threshold mismatch progressively becomes a
  larger fraction of the total gate drive

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Mismatch Problem

• Vt has a significant gradient with distance
  across the wafer
• Must bias current sources from the same bias line
  when they are physically far apart
• Large errors result in current source outputs
  if widely separated devices have small (VGS Vt)

40
MOS Single-Stage Amplifiers

• Poly or diffused Rs have low R , so they must
  be large when designed as an amplifier load
• Instead, use a MOSFET as the passive amplifier
  load
• Common source amp with enhancement-mode load
• Fig 4.22 a

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Amplifier Load

• Fig 4.22 b

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Common-Source Amplifier Load Characteristic

• Fig 4.22 c

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Mathematical Analysis

• When Vi lt 1 Vt, M1 is off no current flow
• When Vi gt 1 Vt, M1 turns on, M1 M2 saturate
• Effective Z Seen looking into source terminal of
  load
• Roughly 1 /gm
• Same calculation as for Bipolar emitter follower

44
Bipolar Emitter Follower

• Fig 3.14 a (old book)

45
Interesting Resistance Parameters

• Fig 3.15c (old book)

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Input Resistance Calculation

• Fig 3.15 a (old book)

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Equations

• Apply known input current source ix
• RL current is i0 ix b0 ix
• vx ix rp RL (ix b0 ix)
• Ri vx rp RL (b0 1)
• ix

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Output Resistance Calculation

• Fig 3.15b (old book)

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Mathematics

• Apply known vx to output
• v1 - vx rp (voltage divider)
• rp RS
• ix vx gm vx
  rp
• rp Rs
  rp Rs
• 1 1 gm rp 1 gm rp
• R0 rp Rs rp Rs rp Rs
• b0 gm rp
• R0 vx rp Rs 1 Rs
• ix 1 b0 gm 1 b0

(
)
(
)
)
(
(
)

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Analysis

• For a MOSFET, Rs is not there, so
• R0 1 , gm k W (VGS Vt)
  2 k W ID
• gm L
  L

D
G
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Analysis

• Neglect body effect and channel length modulation
• Av - gm1 (common source) - (W/L)1
• gm2 (load)
  (W/L)2
• Limits Av to 10 to 20
• Use
• Broadband, low-gain amplifiers with high
  linearity
• Because Av independent of DC operating point

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Equivalent Model

• Fig 3.14 b (old book)

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MOSFET Model

• Fig 4.23
• Incorporate body effect and r0
• Apply KCL at output node
• 0 - gm2 vs2 - vs2 - gmb2 vs2 - gm1 vgs1 -
  vs2
• r02
  r01
• v0 vs2 - gm1
• vi vgs1 g01 g02 gm2 gmb2
• g01 1 , g02 1
• r01 r02
• If gm2 gtgt g01, g02, or gmb2 get simpler equation

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Important Consideration

• Load remains saturated only if the output
  terminal is 1 Vt below the power supply
• Otherwise, the load cuts off malfunctions
• Amp cannot produce an output gt VDD - Vt

55
CMOS Common Source Amp

• Connect a pFET as a current source
• Fig 12.19 (old book)

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Current Source Modeling

• Fig 12.20 (old book)

57
Features

• Load does not suffer from body-effect degradation
  of incremental resistance
• Load remains saturated as long as drain more
  negative than source by VDSSat VGS Vt
• Both transistors saturated for almost the entire
  range of output voltages
• Better O/P voltage swing than nMOS inverter
• Provides high Av to within a few hundred mV of
  either supply
• If bias currents device sizes chosen so that
  (VGS - Vt) of the two devices is in this range

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Circuit for Small-Signal Analysis

• Fig 12.21 (old book)

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Mathematics

• KCL at v0
• v0 gm1 vi v0 0
• r01 r02
• Collect terms
• v0 1 1 -gm1 vi
• r01 r02
• Av v0 - gm1 - gm1
• vi 1/r01 1/r02 g01
  g02
• NB gm / g0 much lower for MOS than for bipolar
  devices usually 10 - 40 X lower

(
)
60
Assumptions

• Graduate channel approximation
• Constant mn in channel
• Strong inversion in saturation
• gm mn Cox W (VGS Vt) 2 ID
• Leff
  VGS Vt
• Cd width of depletion region between channel
  end drain
• g0 ID d Cd (output conductance)
• Leff d VDS
• gm 2 Leff d Cd
• g0 VGS Vt d VDS

-1
(
)
61
Observations

• For constant ID, decreasing L or decreasing W
  (VGS increases) decreases gain.
• This determines transistor sizes needed to
  achieve a given DC gain in a single stage
• If device geometry kept constant,
• Av a 1 , since VGS Vt a ID
• ID

62
Constant Gain in Subthreshold Current Range

• Fig 12.22 (old book)

63
More Observations

• If device size bias current kept constant, gain
  increases with substrate doping, because Cd
  decreases with substrate doping
• Open-circuit gain not degraded by reducing
  transistor dimensions,
• As long as tox and Cd and Cj are proportionally
  reduced.
• Must reduce gate drain voltages in proportion
  to tox
• Must increase substrate doping NA proportionately
  to scale depletion region thickness
• Analog circuits in scaled technologies limited
  only by reduction in signal swing in dynamic
  range, not by reductions in Av due to shorter
  channels

64
Source-Follower Amplifier

• Common drain configuration
• Used to lower impedance level in signal path
• Low frequency input Z very high
• Low frequency output Z 1 / gm
• Can also be used as a level shifter
• DC voltage drop between gate source can be made
  large -- controlled by device geometry bias
  current

65
Source-Follower Amplifier

• Fig 12.23 (old book)

66
Small-Signal Circuit

• Fig 12.24 (old book)

67
Analysis

• Body effect makes threshold vary with v0 -- makes
  gain lt 1
• KCL at current source nodes
• (vi - v0 ) gm - gmb (- v0)
• -v0 vBS
• vi gm v0 (gm gmb)
• v0 gm 1 1
• vi gm gmb 1 gmb / gm 1 C
• Use device in well as source follower and tie
  well to source eliminates body effect, Av 1

68
Summary

• Comparison of MOS and bipolar amps
• Current sources
• MOS single stage amplifiers
• Various amplifier types