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ECE 645 Lecture 3

Conditional-Sum Adders and Parallel Prefix

Network Adders

Required Reading

Behrooz Parhami, Computer Arithmetic Algorithms

and Hardware Design

Chapter 7.4, Conditional-Sum Adder Chapter 6.4,

Carry Determination as Prefix Computation Chapter

6.5, Alternative Parallel Prefix Networks

Conditional-Sum Adders

One-level k-bit Carry-Select Adder

Two-level k-bit Carry Select Adder

Conditional Sum Adder

- Extension of carry-select adder
- Carry select adder
- One-level using k/2-bit adders
- Two-level using k/4-bit adders
- Three-level using k/8-bit adders
- Etc.
- Assuming k is a power of two, eventually have an

extreme where there are log2k-levels using 1-bit

adders - This is a conditional sum adder

Conditional Sum Adder Top-Level Block for One

Bit Position

Three Levels of a Conditional Sum Adder

xi3

yi3

xi2

yi2

xi1

yi1

xi

yi

branch point

1-bit conditional sum block

concatenation

c0

c1

c0

c1

c1

c1

c0

c0

2

2

2

2

2

2

2

2

1

1

11

1

1

2

2

1

2

2

1

1

1

c0

c0

c1

c1

3

3

3

3

1

21

1

2

2

3

3

block carry-in determines selection

5

41

5

c0

c1

16-Bit Conditional Sum Adder Example

Conditional Sum Adder Metrics

Parallel Prefix Network Adders

Parallel Prefix Network Adders

Basic component - Carry operator (1)

g

p

B

B

B

g

p

g

p

g g gp p pp

(g, p) (g, p) (g, p) (g gp, pp)

Parallel Prefix Network Adders

Basic component - Carry operator (2)

g

p

overlap okay!

B

B

B

g

p

g

p

g g gp p pp

(g, p) (g, p) (g, p) (g gp, pp)

Properties of the carry operator

Associative

(g1, p1) (g2, p2) (g3, p3) (g1, p1)

(g2, p2) (g3, p3)

Not commutative

(g1, p1) (g2, p2) ? (g2, p2) (g1, p1)

Parallel Prefix Network Adders

Major concept

Given

(g0, p0) (g1, p1) (g2, p2)

. (gk-1, pk-1)

Find

(g0,0, p0,0) (g0,1, p0,1) (g0,2,

p0,2) (g0,k-1, p0,k-1)

block generate from index 0 to k-1

ci g0,i-1 c0p0,i-1

Similar to Parallel Prefix Sum Problem

Parallel Prefix Sum Problem

Given

x0 x1 x2

xk-1

Find

x0 x0x1 x0x1x2 x0x1x2 xk-1

Parallel Prefix Adder Problem

Given

x0 x1 x2

xk-1

Find

x0 x0 x1 x0 x1 x2 x0 x1 x2

xk-1

where xi (gi, pi)

Parallel Prefix Sums Network I

Parallel Prefix Sums Network I Cost (Area)

Analysis

Cost C(k) 2 C(k/2) k/2

2 2C(k/4) k/4 k/2 4 C(k/4) k/2

k/2 .

2 log k-1C(2) k/2 (log2k-1)

k/2 log2k

2

C(2) 1

Example

C(16) 2 C(8) 8 22 C(4) 4 8

4 C(4) 16 4 2 C(2) 2 16

8 C(2) 24 8 24 32 (16/2) log2 16

Parallel Prefix Sums Network I Delay Analysis

Delay D(k) D(k/2) 1

D(k/4) 1 1 D(k/4) 1 1

. log2k

D(2) 1

Example

D(16) D(8) 1 D(4) 1 1

D(4) 2 D(2) 1 2 4 log2

16

Parallel Prefix Sums Network II (Brent-Kung)

Parallel Prefix Sums Network II Cost (Area)

Analysis

Cost C(k) C(k/2) k-1

C(k/4) k/2-1 k-1 C(k/4) 3k/2 - 2

.

C(2) (2k - 2k/2(log k-1)) - (log2k-1)

2k - 2 - log2k

2

C(2) 1

Example

C(16) C(8) 16-1 C(4) 8-1 16-1

C(2) 4-1 24-2 1 28 - 3 26

216 - 2 - log216

Parallel Prefix Sums Network II Delay Analysis

Delay D(k) D(k/2) 2

D(k/4) 2 2 D(k/4) 2 2

. 2 log2k - 1

D(2) 1

Example

D(16) D(8) 2 D(4) 2 2

D(4) 4 D(2) 2 4 7 2

log2 16 - 1

8-bit Brent-Kung Parallel Prefix Network

4-bit Brent-Kung Parallel Prefix Network

x1

x3

x5

x7

2 bit B-K PPN

s1

s3

s5

s7

8-bit Brent-Kung Parallel Prefix Network Adder

Critical Path

gi xi yi pi xi ? yi

1 gate delay

g g g p p p p

2 gate delays

ci1 g0,i c0 p0,i

2 gate delays

si pi ? ci

1 gate delay

Brent-Kung Parallel Prefix Graph for 16 Inputs

Kogge-Stone Parallel Prefix Graph for 16 Inputs

Parallel Prefix Network Adders

Comparison of architectures

Hybrid

Network 2 Brent-Kung

Kogge-Stone

Delay(k)

2 log2k - 2

log2k1

log2k

Cost(k)

2k - 2 - log2k

k/2 log2k

k log2k - k 1

6

5

Delay(16)

4

32

49

Cost(16)

26

Delay(32)

8

6

5

80

129

57

Cost(32)

Latency vs. Area Tradeoff

Hybrid Brent-Kung/Kogge-Stone Parallel Prefix

Graph for 16 Inputs