IPC JEDEC Leadfree labelling Standard Meeting

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IPC/ JEDEC Lead-free labelling Standard Meeting

• Jasbir Bath, Solectron
• Lee Wilmot, Tyco Electronics
• Jack McCullen, Intel

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Two Lead-free Labelling Standards

• (IPC 1066) Marking, Symbols and Labels for
  Identification of Lead-Free and Other Reportable
  Materials in Lead-Free Assemblies, Components and
  Devices (Released Jan. 2005)
• JEDEC JESD97 Marking, Symbols and Labels for
  Identification of Lead (Pb)Free Assemblies,
  Components and Devices (Released May 2004)

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Meeting to discuss combining of these 2 standards
for Development of Joint IPC/JEDEC lead-free
labelling standard

• Many similarities between these two standards
• IPC standard based on an initial draft of JEDEC
  standard but with new information added to
  address Halide-free and Conformal coating
  identification

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Title Differences

• (IPC 1066) Marking, Symbols and Labels for
  Identification of Lead-Free and Other Reportable
  Materials in Lead-Free Assemblies, Components and
  Devices
• JEDEC JESD97 Marking, Symbols and Labels for
  Identification of Lead (Pb)Free Assemblies,
  Components and Devices
• Comment

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FOREWARD

• JEDEC JESD97 Foreward in JEDEC document. No
  forward in IPC document.
• Comment

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Section 1 SCOPE 

• (IPC 1066) 1 SCOPE
• This standard shall not apply to
• Lead as an alloying element in steel containing
  up to 0.35 lead by weight, aluminum containing
  up to 0.4 lead by weight and as a copper alloy
  containing up to 4 lead by weight.
• Lead in electronic ceramic parts (e.g.,
  piezoelectronic devices).
• JEDEC JESD97 1 SCOPE
•  The Pb-free labeling of electronic systems,such
  as computers, printers, servers, etc is outside
  the scope of this standard.
• Comment

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Section 2 DOCUMENTS/ REFERENCES

• (IPC 1066) 2 APPLICABLE DOCUMENTS
• 2.1 IPC1
•  IPC-T-50 Terms and Definitions for
  Interconnecting and Packaging Electronic Circuits
• IPC-CC-830 Qualification and Performance of
  Electrical Insulating Compound for Printed Wiring
  Assemblies
• 2.2 IEC2
•  IEC 61249-2-21 Materials for Interconnection
  Structures

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Section 2 DOCUMENTS/ REFERENCES

• 2.3 European Parliment3
•  Directive 2002/95/EC of the European Parliament
  and of the Council on the Restriction of the Use
  of Certain Hazardous Substances in Electrical and
  Electronic Equipment ("RoHS Directive").
• 1.    europa.eu.int/eur-lex/pri/en/oj/dat/2003
• 2.4 ANSI/AIM BC4-1999, International Symbology
  Specification - Code 128
• https//www.aimglobal.org/aimstore/linearsymbologi
  es.asp
• JEDEC standard references ROHS Directive only
• Comment

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Section 3 TERMS AND DEFINITIONS

• (IPC 1066) 3 TERMS AND DEFINITIONS
• 3.2 2nd Level Interconnect Label If no label
  or marking is included, a tin-lead finish is
  assumed.
•  
• 3.3 Bar Code Label A label that contains
  machine-readable code consisting of parallel bars
  and spaces, each of various specific widths, such
  as to the three-of-nine USS Code 39 standard or
  Code 128.

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Section 3 TERMS AND DEFINITIONS

• 3.5 Halogen-Free Printed board resins plus
  reinforcement matrix that contain maximum total
  halogens of 1500 ppm with less than 900 ppm
  bromine, and less than 900 ppm chlorine (per IEC
  61249-2-21).
• NOTE RoHS-prohibited brominated substances
  (polybrominated biphenyls and polybrominated
  diphenyl ether) are not generally found in PWB
  board materials. This marking is an aid for
  recycling end-of-life assemblies.
• NOTEWhile the above definition includes all
  halogens, the only specifically identified
  halogens in the IEC standard are bromine and
  chlorine. The IEC standard does not address
  fluorine as found in Teflon/polytetrafluoroethylen
  e (PTFE)substrate materials, and in chemical
  composition of fiberglass reinforcement.
• JEDEC standard does not refer to halogen-free 
• Comment

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Section 4 SYMBOLS AND LABELS

• (IPC 1066) Section 4 Labels and Symbols (small
  section). IPC Sections 4 and 8 combined are
  equivalent to Section 4 of JEDEC standard
• JEDEC JESD97 Section 4 Symbols and labels
  (large section)
• JEDEC JESD97 Section 4 Differences
• The font style shall be Arial, OCR-A or
  equivalent
• The color red shall be avoided as red suggests a
  personal hazard
• Abbreviation of 2nd level interconnect to 2nd
  lvl intct
• Table 1 summarizing Pb-free marking and labeling
  (not present in IPC standard)
• Comment

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Section 5 CATEGORIES

• (IPC 1066) 5 LABELING CATEGORIES  
• 5.1 Solder Categories The following categories
  are meant to describe the Pb-free 2nd level
  interconnect (see Figure 4-5) terminal
  finish/material of components and/or the solder
  paste/solder used in assembly.
• e1 --- SnAgCu
• e2 --- Other Sn alloys (ie. SnCu, SnAg,
  SnAgCuX, etc.-No Bi or Zn)
• e8, e9 symbols are unassigned categories at this
  time.
•  Tin-lead soldered printed circuit boards and
  components shall have no assigned label. However,
  manufacturers who desire to label lead-bearing
  solder shall use "Pb" as the marking code. 
• NOTE It is recognized that some manufacturers
  use "PB" or "pb" in certain part numbers.
•  

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Section 5 Categories

• JEDEC JESD97 Section 5
• e1 (shall not include category e2)
• e0 also unassigned
• Comment

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Section 5 Categories

• (IPC 1066)5.2 Resin Category If the base resin
  and reinforcement matrix used in making the bare
  printed board is halogen free, the label/marking
  "HF" shall be noted on the bare printed circuit
  board identification label. If no "HF" is
  present, a halogen-containing base resin and
  reinforcement matrix is assumed.  
• 5.3 Conformal Coating Categories When
  conformal coatings are applied, and if
  assembly-marking space permits, or if
  contractually required by purchasing agreement,
  coatings may be labeled/marked per IPC-CC-830 as
  follows  
• ER -- Epoxy Resin UR -- Urethane Resin
• AR -- Acrylic Resin SR -- Silicone Resin
• XY -- Paraxylylene
• JEDEC Standard does not include Resin and
  Conformal Coating Category
• Comment

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Section 6 COMPONENT MARKING

• (IPC 1066) 6 COMPONENT MARKING
• 6.3 Font The font should be "Arial" or
  equivalent and the font style shall be regular.
• 6.4 Maximum Assembly Temperature This
  temperature shall be specified in degrees
  Centigrade.
• JEDEC standard has variations in font choice and
  does not specify max. assembly temp. in C
• Comment

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Section 7 PCB ASSEMBLY MARKING

• (IPC 1066) 7 PRINTED CIRCUIT BOARD/ASSEMBLY
  MARKING
• 7.3 Color The color for the 'e' and category
  number should be selected to provide sufficient
  contrast to be legible to corrected, unmagnified
  vision. The font should be "Arial" or equivalent
  and the font style shall be regular.
• 7.6 Marking Sequence The sequence of marking
  should follow the production process, i.e.,
  halogen free (if applicable), reflow/wave solder
  finish, and conformal coating (if applicable).

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Section 7 PRINTED CIRCUIT BOARD ASSEMBLY MARKING

• (IPC 1066) 7.7 Repair Marking The Pb-free
  solder category code shall be permanently
  obscured should any modification or repair with a
  lead-bearing material be used instead of a
  lead-free solder during a repair or rework
  procedure.
• JEDEC JESD97 7 Board/Assembly Marking If max.
  safe temperature left blank then 260C is
  assumed.
• 7.6 Font style shall be Arial, OCR-A or
  equivalent
• Comment

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Section 8 SYMBOL AND LABELS

• (IPC 1066) 8 SYMBOL AND LABELS
• 8.3.2 Assemblies If the label is affixed to
  containers holding printed circuit
  boards/assemblies the category field describes
  the solder paste/solder used in the board
  assembly. The "maximum soldering temperature"
  field, if blank, does not apply.
• JEDEC JESD97 No Section 8 for JEDEC standard.
  JEDEC Section 4 contains similar information to
  the combined sections of IPC 1066 Sections 4 and
  8.
• Comment

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Other Suggested Additions/ Changes to Standard

• 1) ROHS label for components/boards on outer
  packaging containers for ROHS logistics sorting
  in warehousing/ receiving
• 2)
• 3)
• Comments