Validating%20High-Level%20Synthesis

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Validating High-Level Synthesis
Sudipta Kundu, Sorin Lerner, Rajesh
Gupta Department of Computer Science and
Engineering, University of California, San Diego
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High-Level Synthesis
Algorithmic Design
?
Functionally Equivalent
High-Level Synthesis (HLS)
Scheduled Design
Register Transfer Level Design (RTL)
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The Problem
Transformed Program (Implementation)
Input Program (Specification)
Transformations
Is the Specification functionally equivalent to
the Implementation?
Does guarantee gt any errors in translation
will be caught when tool runs

• Translation Validation (TV)
• Optimizing Compiler Pnueli et al. 98 Necula
  00 Zuck et al. 05

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Contributions

• Developed TV techniques for a new setting HLS
• Algorithm uses a bisimulation relation approach.
• Implemented TV for a realistic HLS tool SPARK
• Widely used 4,000 downloads, over 100 active
  users.
• Large Software around 125, 000 LoC.
• Ran it on 12 benchmarks
• Modular works on one procedure at a time.
• Practical took on average 6 secs to run per
  procedure.
• Easy to Implement only a fraction of development
  cost of SPARK.
• Useful found 2 previously unknown bugs.

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Outline

• Motivation and Problem definition
• Our Approach using an Example
• Definition of Equivalence
• Translation Validation Algorithm
• Generate Constraints
• Solve Constraints
• Experiments and Results
• SPARK Parallelizing HLS Framework
• Conclusion

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An Example of HLS
Specification
Original Program
int SumTo10 (int p) int sum 0, k p
while (k lt 10) sum k return sum
int SumTo10 (int p) int sum 0, k p
while (k lt 10) sum k return sum
10 sum ? k p1
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An Example of HLS
Loop Pipelining
Specification
int SumTo10 (int p) int sum 0, k p
while (k lt 10) sum k return sum
t k 1
i4 k k 1
i4 k t
i5 sum sum k
t k 1
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An Example of HLS
Specification
Copy Propagation
int SumTo10 (int p) int sum 0, k p
while (k lt 10) sum k return sum
t k 1
t p 1
i4 k t
i5 sum sum k
i5 sum sum t
t k 1
t t 1
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An Example of HLS
Specification
Scheduling
int SumTo10 (int p) int sum 0, k p
while (k lt 10) sum k return sum
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An Example of HLS
Specification
Implementation
int SumTo10 (int p) int sum 0, k p
while (k lt 10) sum k return sum

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Definition of Equivalence

• Specification Implementation
• gt They have the same set of execution sequences
  of visible instructions.
• Visible instructions are
• Function call and return statements.
• Two function calls are equivalent if the state of
  globals and the arguments are the same.
• Two returns are equivalent if the state of the
  globals and the returned values are the same.

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Technique for Proving Equivalence

• Bisimulation Relation relates a given program
  state in the implementation with the
  corresponding state in the specification and vice
  versa.
• It satisfies the following properties
• The start states are related.

Visible Instruction

• Theorem If there exists a bisimulation relation
  between the specification and the implementation,
  then they are equivalent.

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Our Approach

• Split program state space in two parts
• control flow state, which is finite.
• gt explored by traversing the CFGs.
• dataflow state, which may be infinite.
• gt explored using Automated Theorem Prover
  (ATP).
• Bisimulation relation set of entries of the form
  (p1, p2, ?).
• p1 program point in Specification.
• p2 program point in Implementation.
• ? formula that relates the data.

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Bisimulation Relation

• Bisimulation relation set of entries of the form
  (p1, p2, ?).
• p1 program point in Specification.
• p2 program point in Implementation.
• ? formula that relates the data.

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Translation Validation Algorithm

• Two step approach.
• Generate Constraints traverses the CFGs
  simultaneously and generates the constraints
  required for the visible instructions to be
  matched.
• Solve Constraints solves the constraints using a
  fixpoint algorithm.
• For loops iterate to a fixed point.
• May not terminate in general.
• But in practice can find the bisimulation
  relation.

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Generate Constraints
Specification
Implementation
Constraints
Constraint Variable

• Branch Correlation
• Strongest Post Condition
• Structure of the code

?(a2, b1) ? ks ki
?(a5, b3) ? sums sumi
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Solve Constraints
?(a0, b0) ps pi
ks ki ? WP(?(a2, b1) )
ks ki ? (ks 1) ti
?(a2, b1) ks ki ? (ks
1) ti
?(a2, b1) ks ki ? (ks 1) ti ? sums
sumi
?(a2, b1) ks ki
?(a2, b1) True
WP( ?(a2, b1) ) (ki 1) ? (ks 1) ? (ks 1)
ti
?(a5, b3) True
?(a5, b3) sums sumi
Constraints
?(a2, b1) ? ks ki
?
X
?(a5, b3) ? sums sumi
X
?
?
X
X
?
?
X
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SPARK Parallelizing HLS Framework
SPARK
C Program
Intermediate Representation (IR)
No Pointer No Recursion No goto
Pre-Synthesis Optimization Allocation Scheduling
Transformations
Code Motion, CSE, IVA, Copy Propagation, Dead Code Elimination, Percolation, Trailblazing, Chaining Across conditions, dynamic CSE.
Heuristics
HTG Scheduling Walker, Candidate Op Walker, Get Available Ops, Loop Pipelining
Binding
Scheduled IR
High Level Synthesis
RTL
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Results
Benchmarks No. of simulation relation entries No. of calls to theorem prover Time (secmsec)
1. incrementer 6 9 005
2. integer-sum 6 20 008
3. array-sum 6 24 008
4. diffeq 7 41 016
5. waka 11 79 026
6. pipelining 12 75 023
7. rotor 14 71 025
8. parker 26 281 052
9. s2r 27 570 267
10. findmin8 29 787 148
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Bugs Found in SPARK

• Array Copy Propagation

Code fragment Code fragment Code fragment
Before scheduling After scheduling (Buggy) After scheduling (Correct)
a0 b1 c a0 a0 b1 c b0 a0 b1 c b1

• Code motion

Code fragment Code fragment Code fragment
Before scheduling After scheduling (Buggy) After scheduling (Correct)
ret1 blk0 ltlt3 ret0 ret1 ret0 ret1 ret1 blk0 ltlt3 ret1 blk0 ltlt3 ret0 ret1
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Related Work

• Translation Validation
• Sequential Programs Pnueli et al. 98 Necula
  00 Zuck et al. 05
• CSP Programs Kundu et al. 07
• HLS Verification
• Scheduling Step
• Correctness preserving transformation Eveking
  99
• Symbolic Simulation Ashar 99
• Formal assertions Narasimhan 01
• Relational approaches for Equivalence of FSMDs
  Kim 04, Karfa 06

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Conclusion and Future Directions

• Presented an automated algorithm for translation
  validation of the HLS process.
• Implemented it for a HLS tool called SPARK.
• Modular works on one procedure at a time.
• Practical took on average 6 secs to run per
  procedure.
• Easy to Implement only a fraction of development
  cost of SPARK.
• Useful found 2 previously unknown bugs.
• In future,
• Remaining phases of SPARK parsing, binding and
  code generation.

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Thank You