Fault Collapsing via Functional Dominance - PowerPoint PPT Presentation

About This Presentation
Title:

Fault Collapsing via Functional Dominance

Description:

7744 (0.62), #dom. = 5824 (0.46) May 15, 2003. Agrawal et al.: Fault Collapsing. 5 ... Dom. Equ. Dom. Equ. Hierarchical. with functional. Flat. structural only ... – PowerPoint PPT presentation

Number of Views:267
Avg rating:3.0/5.0
Slides: 23
Provided by: AgereS2
Category:

less

Transcript and Presenter's Notes

Title: Fault Collapsing via Functional Dominance


1
Fault Collapsing via Functional Dominance
Vishwani D. Agrawal Rutgers University, Dept. of
ECE, Piscataway, New Jersey, USA vishwani02_at_yahoo.
com http//cm.bell-labs.com/cm/cs/who/va A. V.
S. S. Prasad and M. V. Atre Agere Systems,
Bangalore, India
2
Test Vector Generation Flow
  • DUT
  • Generate fault list
  • Collapse fault list
  • Generate test vectors

Fault Model
Required fault coverage
3
Background
  • Single stuck-at fault model is the most popularly
    used model.
  • Two faults f1 and f2 are equivalent if the same
    tests detect f1 and f2 (f1f2)
  • If all tests of fault f2 also detect fault f1,
    then f1 is said to dominate f2 (f2?f1).

a0 a1
c0 c1
b0 b1
4
Background
  • Both equivalence and dominance relations are
    transitive in nature.
  • (f1 ? f2) and (f2 ? f3) gt (f1 ? f3)
  • If f1 dominates f2 and f2 dominates f1 then f1
    and f2 are equivalent.
  • (f1 ? f2) and (f2 ? f1) gt (f1 f2)
  • Number of faults in a 2-input AND gate reduces
    from 6 to 4 (by equivalence) and to 3 (by
    dominance) collapsing.
  • Example c6288, faults 12576
    equ. 7744 (0.62), dom. 5824 (0.46)

5
Problem Statement
  • To devise a new method for fault collapsing with
    following attributes
  • A single procedure for equivalence and dominance
  • Global analysis (independence from direction, and
    other choices, in collapsing)
  • Use functional equivalences and dominances
  • Hierarchical fault collapsing (collapsing in
    large circuits using pre-collapsed sub networks)

6
Dominance Graph
  • A fault in the circuit is represented by a node
    in the graph.
  • A directed edge from f2 to f1 indicates that f1
    dominates f2 (f2 ?f1).
  • Edges can represent either structural or
    functional relations.

7
Dominance Matrix
  • Graph is represented as a connectivity matrix
  • Each fault is assumed to be equivalent to itself
  • Treats functional and structural relations
    identically
  • (f1 ? f2) and (f2 ?f1) gt f2 f1. Appear as
    symmetrical components in the matrix (e.g.,
    a0,b0,c0)
  • faults 6 (dimension of dominance matrix)

2-input AND gate
8
Transitive Closure
  • Transitive closure (TC) of the dominance matrix
    gives all dominance relations between faults.
  • TC is computed by the O(n3) Floyd-Warshall
    algorithm, where n is the dimension of the
    dominance matrix.

9
Transitive Closure
  • (F1 ? F2) and (F2 ? F3) gt (F1 ? F3)

10
Example
A
D
E
B
C
Dominance Graph
A0
A1
11
Functional Dominance
f1
Always 0
f0
f2
f1 dominates f2
12
Functional Equivalence
f1
Always 0
f0
f2
f1 dominates f2 and f2 dominates f1
13
Functional Equivalence
f1
f0
Always 0
f2
f1
Always 0
f2
14
XOR Circuit
c1
h1
g1
m0
g0
i1
f1
Functional Equivalences (c1,f1), (g1,h1,i1),
(g0,m0),
(d1,f0) and (e1,c0) additional dominances not
shown
15
XOR Circuit
Structural equivalence collapsing 16 faults
16
XOR Circuit
Functional equivalence collapsing 10 faults
17
XOR Circuit
Functional dominance collapsing 4 faults
18
Design Hierarchy
  • Large designs are modular and hierarchical.
  • Advantageous to store the fault information of
    repeated blocks in a library.
  • When configured as a library cell the fault list
    includes cell PI PO faults for transitivity.

Top module
B1
B1
B0
C0
C0
C0
C0
C1
C1
19
8-bit Ripple Carry Adder
20
Fault Collapsing Using Functional Dominances of
xor
Number of collapsed faults Number of collapsed faults Number of collapsed faults Number of collapsed faults
Flat structural only Flat structural only Hierarchical with functional Hierarchical with functional
Equ. Dom. Equ. Dom.
xor cell 24 16(0.63) 13(0.54) 10(0.41) 4(0.17)
Full-adder 60 38(0.63) 30(0.50) 26(0.43) 14(0.23)
8-bit adder 466 290(0.62) 226(0.49) 194(0.42) 112(0.24)
c499exp 2710 1574(0.58) 1210(0.45) 950(0.35) 586(0.22)
Circuit name
All faults
21
References
  • A. Lioy, Looking for Functional Equivalence,
    Proc. ITC, 1991, pp. 858-863.
  • A. V. S. S. Prasad, V. D. Agrawal and M. V. Atre,
    A New Algorithm for Global Fault Collapsing into
    Equivalence and Dominance Sets, Proc. ITC, 2002,
    pp. 391-397.
  • H. Al-Asaad and R. Lee, Simulation-Based
    Approximate Global Fault Collapsing, Proc. Int.
    Conf. VLSI, 2002, pp. 72-77.
  • V. D. Agrawal, A. V. S. S. Prasad and M. V. Atre,
    Fault Collapsing via Functional Dominance,
    Proc. ITC, 2003 (accepted).

22
Conclusion
  • A new algorithm for global fault collapsing
  • With functional equivalence number of faults for
    ATPG reduces
  • Fault set reduced below 25 with functional
    dominances (Caution fault coverage not correct
    when redundant faults are present)
  • Library based hierarchical fault collapsing is a
    useful concept
  • Further studies are being carried out on
    independent fault sets
Write a Comment
User Comments (0)
About PowerShow.com