Via Topology for 3-D Integration

1
Via Topology for 3-D Integration

• 7 April 2000
• Peter W. Wyatt and Paul V. Davis
• wyatt_at_LL.mit.edu
• 781-981-7882 voice
• 781-981-7889 fax

2
Via Topology Introduction

• Interconnect reticle set is being designed to
  test four options for vertical vias connecting
  three wafers
• Explore variations of design rules
• Optimize process for high yield
• Minimize reticle cost by using the same reticles
  for all three wafers to the extent possible
• Bottom wafer is always upright during assembly
• Top two wafers may be either inverted or upright
• Initial work used inverted wafers
• Vias may be either offset or concentric
• Initial work used offset vias

3
Offset Via Topology with Inverted Circuits -- The
Original

• All layers are the same on all 3 circuits except
  deep via and Metal 4
• Mask count Remove, M1, V12, M2, V23, M3, SV,
  DV12, DV23, M4W2, M4W3, Passivation 12 masks
• Cannot have a transistor lined up with a shallow
  or deep via

4
Chip Topology with Inverted Assembly
Both wafers the same through metal 3

• Use a single reticle set for all three wafers to
  save cost
• Inverted assembly creates two copies of each
  structure
• One is useful, the other is not
• Does not occur with upright assembly
• Not an issue for real circuits

5
Offset Via Topology with Inverted Circuits
--Chain of Deep Vias

• Deep vias and metal 4 are different on each
  wafer, but all other layers are the same on all
  three
• Shallow via chain is easy, the same on wafers 2
  and 3

6
Offset Via Topology with Inverted Circuits
--Chain of Both Shallow and Deep Vias

• Deep vias and metal 4 are different on each
  wafer, but all other layers are the same on all
  three
• Creates extraneous floating metal, but that does
  no harm
• A problem these chains occupy large area
  because
• They are long -- many thousand vias
• Multiple copies are needed with design rule
  variations

7
Offset Via Topology with Inverted Circuits
--Making Chains Reusable

• Make the same structure work for multiple cases
• Left and right instances of inverted
• Inverted and upright
• To save space on the reticle given the need for
  long chains
• Requires M3W1 different than M3W2 gt mask count
  13

8
Offset Via Chain with Upright Circuits --Same
Layout as Inverted

• Allows transistor below shallow or deep via

9
Concentric Via Topology with Inverted Circuits
Passivation cut
M1
M3
M3
M1 (same as w2)

• M1 and M3 must both be different on W2 and W3
• M1 is the same on W1 and W2 M3 is the same on W1
  and W3
• One more mask gt count 14
• Masks if this were the only type of via Remove,
  M1W12, M1W3, V12, M2, V23, M3W13, M3W2, DV12,
  DV23, Passivation count 11

10
Concentric Via Topology with Upright Circuits
Passivation cut
M3

• M3 is different on W1 and W2 W1 and 3 can be the
  same
• M1 is the same on all wafers
• No added mask
• Masks if this were the only type of via Remove,
  M1, V12, M2, V23, M3W13, M3W2, DV12, DV23,
  Passivation count 10

11
Concentric Via Topology with Inverted
CircuitsComplete Chain

• M1 is the same on W1 and W2 M3 is the same on W1
  and W3
• M2 is the same on all three wafers
• Left and right instances are both good
• Cannot make inverted and upright with the same
  layout
• Possible with offset vias because M4 is patterned
  after assembly

12
Via Topology -- Status

• Four types of via have been evaluated
• Most reticles can be used for all three wafers
• All four types of via can be fabricated with 14
  reticles
• Many different via chains must be laid out
• Some layouts can produce more than one type,
  saving space
• Layout of offset via chains is in progress
• Concentric via layout will follow