Tunnel Transistors Can they beat the MOSFET subthresholdswinglimit of 60 mVdecade

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JENA MBE LAB January 2005
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Tunnel Transistors - Can they beat the MOSFET
subthreshold-swing-limit of 60 mV/decade?

• Qin Zhang
• Dept. of Electrical Engineering
• University of Notre Dame
• Solid State Seminar 02/01/05

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Outline

• Introduction
• Subthreshold Device Physics
• MOSFETs limited to 60 mV/decade
• Tunnel transistors can exceed the MOS limit
• Recent Tunnel Transistor Demonstrations
• Carbon Nanotube Tunnel FET (IBM)
• Si/SiGe Vertical Tunnel FET
• (Univ. of German Federal Armed Forces)
• Notre Dame Si Lateral Tunnel FET Simulations
• Conclusion

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Introduction n-Channel MOSFET
S. Sze, Physics of Semiconductor Devices, 2nd ed,
p. 434.
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IntroductionTunnel Transistor
C. Aydin, A. Zaslavsky et. al. Appl Phys Lett
84(10), 1780 (2004)
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Introduction

• What is the subthreshold swing S?
• The voltage required to increase or reduce ID by
  one decade
• Why we desire a small S?
• Small gate voltage swing
• Low power logic applications

n-MOSFET drain current vs. gate-source
voltage for various gate lengths (1.5 to 7 mm)
S. Sze, Physics of Semiconductor Devices, 2nd ed,
p. 470.
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Introduction

• Why are we interested in tunnel transistors
  relative to MOSFETs?
• smaller subthreshold swing S?!
• lower leakage current (tunneling is no longer a
  parasitic effect)
• smaller gate length (higher device density)
• shorter transit time
• smaller temperature dependence

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MOSFET Subthreshold Physics

• Subthreshold current is dominated by diffusion,
• just like the bipolar transistor

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MOSFET Subthreshold Swing

• For thin oxide and low NA,
• By definition
• The MOSFET limit is 60 mV/dec (at 300 K)

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Tunneling Transistor Physics

• The Zener tunneling current is
• Veff is the difference of the Fermi level on one
  side of the tunnel junction and the Fermi level
  on the other side

Ec
qVeff
Ev
Efp
Efn
Ec
Ev
Energy band diagram of Reverse-biased pn
junction
S. M. Sze, Physics of Semiconductor Devices
(John Wiley, 1st Edition) pp. 111.
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Tunneling Transistor Physics

• ? is the magnitude of the electric field,
  determined by the slope of the energy level in
  the band diagrams
• determined by the material properties

Veff 1 V
Y. Taur, C. H. Wann and D. J. Frank, IEDM Tech.
Dig., pp. 789-792 (1998).
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Tunneling Transistor Subthreshold Swing

• By definition
• To beat the limit of MOSFET

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Carbon Nanotube Tunnel FET

• Double gated CNFET structure

• Working Principles
• Band filter like operation A tunneling current
  can only flow once the conduction band in the
  aluminum gated region bends below the valence
  band in the source area that is controlled by the
  silicon back gate

J Appenzeller, Y M Lin, J Knoch, and Ph Avouris,
Phys Rev Lett 93, 196805 (2004)
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Carbon Nanotube Tunnel FET

• IV Curve

• Why S lt 60mV/dec?
• Band filter like operation, the first term
  dominates S40mV/dec, dVgs/dVeff1
• Veff17mV

Drain current vs. gate-source voltage for
various Al-gate oxide thickness
J Appenzeller, Y M Lin, J Knoch, and Ph Avouris,
Phys Rev Lett 93, 196805 (2004)
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Si/SiGe Vertical Tunnel FET

• Vertical Tunnel FET with SiGe in the ?p Layer

• Working principles

P F Wang, K Hilsenbeck, Th Nirschl, et al.
Solid-State Electronics 48, 2281 (2004) K K
Bhuwalka, J Schulze, and I Eisele, J J of Appl
Phys 43, 4073 (2004)
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Si/SiGe Vertical Tunnel FET

• IV Curve

• Subthreshold swing S vs. Ge mole fraction in the
  ?p layer

(a)
Drain current vs. gate-source voltage with change
in Ge mole fraction in the ?p layer
K K Bhuwalka, J Schulze, and I Eisele, J J of
Appl Phys 43, 4073 (2004)
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Si/SiGe Vertical Tunnel FET

• Why S lt 60mV/dec?
• The second term must determine it!
• i-silicon layer doping type and concentration
• gate oxide thickness
• source doping concentration
• Boron doping level is higher in SiGe than in Si,
  which leads to a higher source doping
  concentration and a smaller S

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Si/SiGe Vertical Tunnel FET

• Simulation with source doping of 1022 cm-3

10 mV/8 decades 1 mV/decade!
P F Wang, K Hilsenbeck, Th Nirschl, et al.
Solid-State Electronics 48, 2281 (2004)
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Si Lateral Tunnel FET

• Fully-depleted SOI structure (under the gate)

• Gate lengths can scale to a few nanometers
• The gate rests on depletion regions lowering gate
  capacitance.

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Si Lateral Tunnel FET

• Modified 1D Poisson Equation
• on the p-side
• parabolic approximation at low Vds
• on the n-side

K K Young, IEEE Tran on Electron Devices 36, 399
(1989)
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Si Lateral Tunnel FET

• Boundary Conditions

BOX
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Si Lateral Tunnel FET

• Band diagrams
• tox 1 nm, tSi 2 nm, L 20 nm

Off State
On State
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Si Lateral Tunnel FET

• Estimation of S
• For Si,
• Veff can be read from the band diagrams
• ? is the electric field,

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Si Lateral Tunnel FET

• S can be less than 60 mV/dec within a small range
  of gate voltage
• Band filter like Tunnel FET
• so for Veff lt 26 mV, S is lower than 60
  mV/dec

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Si Lateral Tunnel FET

• Current can increase two decades quickly within
  tens of mVs

VDS
Current vs. Veff with the device width of 100nm
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Tunnel Transistors - Can they beat the MOSFET
subthreshold-swing-limit of 60 mV/decade?
YES
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Conclusions

• Theory shows subthreshold swings less than 60
  mV/decade can be achieved with interband tunnel
  transistors
• Two recently published tunnel transistors (CNFET
  and Si/SiGe Vertical Tunnel FET) have
  experimentally demonstrated subthreshold swings
  of 40 mV/decade
• A new proposed Si Lateral Tunnel FET shows a
  subthreshold swing less than 35 mV/decade
• The subthreshold-swing-limit for tunnel
  transistors can be vanishingly small, even 1
  mV/decade.

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Continuing Questions

• What tunnel transistor geometry provides the best
  gate control? What should be constructed?
• What materials system should this transistor
  utilize?
• SOI or XOI where X is? Ge? InAs? InSb? InN?
• What physics sets the limit to subthreshold slope
  in a practical tunnel transistor embodiment?
• How do we fabricate this transistor?