CENG 446

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CENG 446 Advanced Computer Architectures

• Dr. Brian T. Hemmelman
• Chapter 2 Slides (Part 1)

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Introduction

• We will start by studying the common types of
  tasks that programs perform and what MIPS
  instructions (or sequences of instructions) are
  needed to complete those tasks.
• Once we are familiar with the categories of
  instructions and their use we will learn the
  bit-format of the various instruction types.
• This is important as the instruction bits will be
  part of the processor control.

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Program Tasks

• In order to do useful work programs must be
  able to complete certain common tasks.
• Data transfer (get or save data)
• Compute or manipulate data (do something with the
  data)
• Arithmetic operations
• Logical operations
• Make decisions (often based on data)
• Branch (skip to other instruction sequencesoften
  based on the result of a decision)

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MIPS Instruction Categories

• Data Transfer
• Arithmetic
• Logical
• Conditional Branch
• Unconditional Jump

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MIPS Assembly Language
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MIPS Registers

• Instructions tend to operate on data located in
  32-bit registers.
• Registers are ultimately part of the overall
  memory hierarchy which well cover later.
• The MIPS architecture definition contains 32 of
  these 32-bit registers.

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MIPS Registers

• Some of the different registers in MIPS
• s0 - s7 Eight saved registers
• t0 - t9 Ten temporary registers
• v0 - v1 Two return value registers
• a0 - a3 Four argument registers
• zero Register hardwired to 0
• The MIPS architecture merely defines 32 registers
  with the Register 0 being the Zero Register.
  The others are r1 to r31.

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An Initial Instruction Example

• C code statementa b c
• Assume the variables a, b, and c are located in
  the s0, s1, and s2 registers respectively.
• The corresponding MIPS assembly instructionadd
  s0, s1, s2
• The first register is the destination register
  and the other two are source registers.

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Another Arithmetic Example

• C source codef (g h) - (i j)
• Assume f, g, h, i, and j are located in s0, s1,
  s2, s3, and s4 respectively.
• We must calculate the intermediate operations
  within the parentheses first before getting the
  final answer to store in s0 (the variable
  f).add t0, s1, s2 t0 gh add t1,
  s3, s4 t1 ijsub s0, t0, t1 f
  t0 - t1

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Immediate Arithmetic Example

• Notice all the operands (or data) in the previous
  examples were already contained in the
  appropriate registers. These are examples of
  R-type (register-type) instructions.
• We often have need to use a specific constant
  directly in which case we use I-type (immediate)
  instructions.
• C source codey x 7
• MIPS assembly code (assume s1 holds y and s2
  holds x)addi s1, s2, 7

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Logical operand examples

• We could, for example, use logical OR with
  immediate data to force the contents of a
  register to a specific valueori s3, zero,
  9 s3 will now contain 9
• There isnt an actual NOT function in the
  instruction set. Part of the rationale is that
  logical NOT would only use one source operand and
  this would then be a different format as compared
  to other functions.
• Instead we can accomplish logical NOT by using
  the NOR function and the zero registernor
  s1, s2, zero s1 contains NOT(s2)

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Memory Operands

• Larger programs operate on more data than will
  fit in the 32 registers that are part of the main
  processor architecture.
• We therefore need to a way to get data into the
  registers from main memory. These are the data
  transfer instructions
• MIPS data is often 32-bit data which is four
  bytes. A four-byte or 32-bit data quantity is
  called a word.
• To move data between main memory and the
  registers we use lw (load word) and sw (store
  word).
• There are also data transfer instructions for
  bytes and half-words.

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Memory Alignment

• Although a lot of data in a MIPS program will be
  words, it is common to still need to access
  individual bytes of memory. Thus, each
  individual memory address represents a single
  byte.
• Words of information then will actually occupy
  four memory locations.
• The address for a word then matches the location
  of one of the four bytes within the word, and the
  addresses of sequential words will differ by 4.
• MIPS words must start at addresses that are
  multiples of 4. This intentional restriction is
  called Alignment Restriction.
• Imposing alignment restriction tends to speed up
  data transfer operations.

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Example Word Addresses for an Array
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MIPS is Big-Endian

• Since a word is four bytes we can start storing
  those four bytes into memory starting at either
  the MSB or LSB.
• MIPS stores the Most Significant Byte in the
  first address location which is called
  Big-Endian format.
• Little-Endian format stores the Least
  Significant Byte in the first address location.

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Big- versus Little-Endian

• Assume our 32-bit word is 0x03050C0F.

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Memory Access Example

• C source codeg h A8Assume g is in
  s1, h is in s2, and the base address of A is
  contained in s3.
• The eighth element of A will start 32 bytes (48)
  after the base address of the entire array.
  Thus, an offset of 32 will identify the correct
  memory location.
• MIPS assembly codelw t0, 32(s3) Add 32 to
  base address contained in s3. Load the word
  starting in that address into register
  t0.add s1, s2, t0

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Books Memory Access Example Load and Store

• C source codeA12 h A8Assume h is in
  s2 and base address of A is in s3.
• MIPS assembly codelw t0, 32(s3) Load A8
  into t0add t0, s2, t0 Compute h A8sw
  t0, 48(s3) Store t0 contents in A12