A Geometric-Primitives-Based Compression Scheme for Testing Systems-on-a-Chip

1
A Geometric-Primitives-Based Compression Scheme
for Testing Systems-on-a-Chip

• Aiman El-Maleh1, Saif al Zahir2, Esam Khan1
• 1 King Fahd University of Petroleum Minerals,
  Dept. of Computer Eng., Saudi Arabia
• 2 University of British Columbia, ECE Dept.,
  Canada

2
Outline

• Motivation
• Test compression techniques
• Used geometric shapes
• Proposed encoding algorithm
• Test set sorting
• Test set partitioning
• Encoding process
• Decoding process
• Experimental results
• Conclusions

3
Motivation

• With todays technology, complete systems with
  millions of transistors are built on a single
  chip
• Increasing complexity of systems-on-a-chip and
  its test data size increased cost of testing
• Test data must be stored in tester memory and
  transferred from tester to chip
• Cost of automatic test equipment increases with
  increase in speed, channel capacity, and memory.
• Need for test data reduction is imperative
• Test compaction
• Test compression

4
Test compression techniques

• Burrows-wheeler transformation modified
  run-length coding Yamaguchi et al., ITC 97
• Statistical coding based on modified Huffman
  codes Jas et al., VTS 99
• Coding based on storing differing bits, decoding
  based on embedded processor Jas et al., ICCD 99
• Variable-to-block run-length coding, encoding
  runs of 0s followed by 1 Jas et al., ITC 98
• Variable-to-variable run-length coding using
  Golomb codes Chandra et al., VTS 2000
• Variable-to-variable run-length coding using FDR
  codes Chandra et al., VTS 2001

5
Used geometric shapes

• Point
• Lines

Type1 Type2 Type3 Type4

6
Used geometric shapes- cont.

• Triangles
• Rectangle

Type1 Type2 Type3 Type4

7
Proposed encoding algorithm

• Test set sorting
• Generate clusters of 0s or 1s efficiently
  encoded by geometric shapes
• Test set partitioning
• Test set partitioned into L segments
• Each segment consists of K blocks
• Each block is NxN bits
• Block encoding
• Do not encode block and store actual test data
  (00)
• Encode block as filled with all 0s (010)
• Encode block as filled with all 1s (011)
• Encode 0s by geometric shapes (10)
• Encode 1s by geometric shapes (11)

8
Test set sorting - criteria
1-distance 0 1 x
0 0.0 0.0 0.0
1 0.0 1.0 0.25
x 0.0 0.25 0.25
b11 b12 b13
b21 b22 b23
v1
v2
0/1-distance 0 1 x
0 1.0 0.0 0.25
1 0.0 1.0 0.25
x 0.25 0.25 0.25
0-distance 0 1 x
0 1.0 0.0 0.25
1 0.0 0.0 0.0
x 0.25 0.0 0.25
9
Test set sorting - example
v1 0 0 1 x 1 0 x x
v2 0 x 1 1 0 0 0 1
v3 1 1 x 1 1 x 0 1
Original Vectors
v2 0 x 1 1 0 0 0 1
v1 0 0 1 x 1 0 x x
v3 1 1 x 1 1 x 0 1
Sorted Vectors 0-distance
v3 1 1 x 1 1 x 0 1
v2 0 x 1 1 0 0 0 1
v1 0 0 1 x 1 0 x x
Sorted Vectors 1-distance
10
Test set partitioning
11
Block encoding process

• Check if block can be encoded as filled with all
  0s or with all 1s
• Encode the 1 bits by geometric shapes
• Extract all geometric shapes covering 1 bits
• Solve a covering problem to select the smallest
  number of geometric shapes covering the 1 bits
• Encode the 0 bits by geometric shapes
• Extract all geometric shapes covering 0 bits
• Solve a covering problem to select the smallest
  number of geometric shapes covering the 0 bits
• Determine whether to encode the block by
  geometric shapes or not which bit to encode

12
Encoding format

• Test header information
• Block size 2 bits (8x8, 16x16, 32x32)
• No. segments 14 bits
• No. blocks per segment 14 bits
• Row remainder 5 bits
• Column remainder 5 bits
• Block encoding information
• Block encoded by shapes or not 1 bit
• Encoded bit 1 bit
• No. shapes 3 bits or 4 bits or 5 bits
• Shape type 2 bits
• Sub-shape type 2 bits
• Coordinate 6 bits or 8 bits or 10 bits
• Distance 3 bits or 4 bits or 5 bits

13
Decoding process

• Decoding algorithm can be implemented in
• Software using an embedded processor on chip
• Hardware
• Each segment of blocks has to be decoded and
  stored in memory
• Test vectors of a decoded segment are sent to
  circuit under test
• Limitation of decoder is the need for memory to
  store a block segment
• Segment decoding and circuit testing can be done
  in parallel if memory resources available

14
Experimental results

• Benchmark circuits
• Largest ISCAS 85 and full-scanned versions of
  ISCAS 89 circuits
• Test sets
• Dynamic compaction by Mintest Hamzaoglu Patel,
  ICCAD 98
• Static compaction by Mintest
• Block sizes
• 8x8, 16x16, and 32x32
• Sorting criteria
• 0-distance, 1-distance, and 0/1-distance
• Compression ratio
• (Original Bits - Compressed Bits)/Original
  Bits

15
Compression results for different sorting
criteria (8x8 block)
16
Compression results for different block sizes
(0/1-distance)
17
Comparison with Golomb FDR codes
18
Impact of test set on compression
Test Set 2
Test Set 1
Circuit Orig. Bits Comp. Ratio Comp. Bits Orig. Bits Comp. Ratio Comp. Bits
s5378 23754 57.94 9991 20758 49.167 10552
s9234 39273 57.22 16801 25935 38.145 16042
s13207 165200 86.628 22091 163100 82.403 27776
s15850 76986 70.188 22952 57434 58.909 23600
s35932 28208 78.123 6171 21156 25.492 15763
s38417 164736 62.226 62228 113152 45.989 61115
s38584 199104 65.594 68504 161040 65.382 55749
19
Conclusions

• Proposed a novel, very efficient test
  compression/ decompression scheme for testing
  systems-on-a-chip
• Technique based on encoding test data by
  geometric shapes
• Exploits test vector reordering, partitioning,
  type of encoded bit, and whether or not to encode
  a block
• Very high compression ratio achieved
• Best compression ratio reported and significantly
  higher than published results
• Decoder requires memory to store a test segment