On Application of Output Masking to Undetectable Faults in Synchronous Sequential Circuits with DFT

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On Application of Output Masking to Undetectable
Faults in Synchronous Sequential Circuits with
DFT Logic

• Irith Pomeranz, Purdue University
• Sudhakar M. Reddy, University of Iowa

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Motivation

• DFT for synchronous sequential circuits causes
  redundant faults in the original circuit to be
  detectable in the circuit with DFT.
• It has been argued that such faults should not be
  detected in order to avoid reducing the yield
  unnecessarily.

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Overview

• Existing Solution
• Proposed Solution Mask Detections of Redundant
  Faults
• Procedure for Selecting Masked Output Values
  under a Given Test Set
• Experimental Results
• Conclusion

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Current SolutionYield Recovery

• Some chips that fail specific structural tests
  are subjected to functional tests.
• The chips are accepted as good if they pass the
  functional tests.
• However, functional tests are expensive to
  develop and apply.

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Proposed Solution

• Mask, or ignore, output values where originally
  redundant faults are detected in the circuit with
  DFT.
• Avoid masking of detectable faults of the circuit
  without DFT.

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Notation

• The set of detectable faults F in the circuit
  with DFT is partitioned into two subsets.
• FOD Subset of faults detectable in the original
  circuit. More generally, faults that can affect
  normal circuit operation.
• These faults should continue to be detected in
  the circuit with DFT after masking.
• FOR Subset of redundant faults in the original
  circuit.
• These faults should be masked.

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Conditions

• Ideally, mask all the faults in FOR leaving all
  the faults in FOD detected.
• In practice, explore solutions where at most P
  faults out of FOD are masked.
• P0 implies that all the faults in FOD continue
  to be detected.
• As many faults as possible out of FOR are masked.

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Example
X detection using fault simulation with fault
dropping. Y detection using fault simulation
without fault dropping.
FOD
FOR
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Avoiding Detection of f7

• Need to mask the values of output bits 0 and 2.
• Affected faults in FOD f0,f1,f5.
• Perform fault simulation of f0,f1,f5 with bits 0
  and 2 masked (ignore detection on these bits).
• Suppose that all the faults are detected again.

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After Masking f7
FOD
FOR
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Avoiding Detection of f8

• Need to mask the value of output bit 1.
• Affected faults in FOD f2,f3,f4.
• Perform fault simulation of f2,f3,f4 with bits 0,
  1 and 2 masked (ignore detection on these bits).
• Suppose that f2 and f3 are detected again but f4
  is not.
• If Pgt0 this solution is acceptable.

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After Masking f8
FOD
FOR
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Implementing Masking

• Existing test application practices allow us to
  ignore output values that are unknown in the
  fault free circuit.
• The same mechanism can be used for ignoring
  output values to avoid the detection of redundant
  faults.

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Alternatives

• Perform masking for a given test set.
• Generate a test set targeting only faults in
  FOD.
• Faults in FOR may be detected accidentally.
• Generate a test set explicitly avoiding detection
  of faults in FOR.
• May not always be possible.
• May be time consuming since tests that detect
  faults in FOR have to be rejected.
• Perform test generation and masking
  simultaneously.

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Basic Procedure for a Test Set T

• Perform fault simulation with fault dropping of T
  for the faults in FOD ?FOR.
• Set P0.
• Mask For every f in FOR, call Procedure
  Mask(f,P).
• If there is at least one fault in FOR, which is
  still detected, set PP1 and go to Mask.

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Procedure Mask(f,P)

• Perform fault simulation without fault dropping
  for f and find the set of bits I(f) where f is
  detected.
• For every fault f, if f is detected on one of
  the bits in I(f), perform fault simulation with
  fault dropping to find a different bit where f
  can be detected.
• Find the number of faults NODM(f) in FOD that
  cannot be detected if f is masked. If NODM(f)?P
  mask the bits in I(f).

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Shortcut

• Initially, NODM(f)0 for every f in FOR.
• NODM(f) is updated when it is computed in
  Procedure Mask(f,P).
• If NODM(f)gtP, f does not need to be considered by
  Procedure Mask(f,P).
• At the end of an iteration where no masking was
  done, P can be incremented to the next value of
  NODM(f) for a detected f in FOR.

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Simulation Effort

• Initial fault simulation with fault dropping.
• Fault simulation without fault dropping for
  faults in FOR. This is avoided if f in FOR
  becomes undetected after masking based on other
  faults in FOR.
• Fault simulation with fault dropping for a subset
  of the faults after every masking step.

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Experimental Results

• Circuit with DFT is the full-scan circuit.
• FOD is the set of faults detectable assuming
  reset to the all-0 state. FOR includes the
  remaining combinationally irredundant faults.
• Conventional, compact test sets.
• 10-detection test sets
• Provide more opportunities for masking faults in
  FOR without masking faults in FOD.
• Test sets generated for faults in FOD
• Detect fewer faults in FOR.

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NORD0, NODM0
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Results for s641
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Results for s5378
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Conclusion

• To deal with redundant faults that become
  detectable due to DFT, it is possible to mask
  their fault effects.
• This fits well with test application practices.
• We described a procedure for selecting masked
  output values to avoid detection of redundant
  faults by a given test set.