CS231 Fall 05 Review Session

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CS231 (Fall 05)Review Session

• Sangkyum Kim
• Sep 29, 2005

2
Outline

• Addition

• Multiplication

• Subtraction

• Midterm1 Review

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
3
Binary addition by hand
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
4
Adding two bits (half adder)
0 0 0 0 1 1 1 0 1 1 1 10
C XY S X Y X Y X ? Y
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
5
Adding three bits
0 0 0 00 0 0 0 01 0 1 0 01 0
1 1 10 1 0 0 01 1 0 1 10 1 1
0 10 1 1 1 11
(These are the same functions from the decoder
and mux examples.)
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
6
Full adder equations
S ?m(1,2,4,7) X Y Cin X Y Cin X
Y Cin X Y Cin X (Y Cin Y Cin) X
(Y Cin Y Cin) X (Y ? Cin) X (Y ?
Cin) X ? Y ? Cin Cout ?m(3,5,6,7) X Y
Cin X Y Cin X Y Cin X Y Cin (X Y X
Y) Cin XY(Cin Cin) (X ? Y) Cin XY
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
7
Full adder circuit
S X ? Y ? Cin Cout (X ? Y) Cin XY
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
8
A 4-bit adder
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
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An example of 4-bit addition
A1011 (eleven), B1110 (fourteen)
Woohoo! The final answer is 11001 (twenty-five).
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
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Hierarchical adder design
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
11
Some other Issues

• Gate Delays
• Ripple Carry Adder
• Carry Lookahead Adder

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
12
Outline

• Addition

• Multiplication

• Subtraction

• Midterm1 Review

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
13
A 2x2 binary multiplier
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
14
Outline

• Addition

• Multiplication

• Subtraction

• Midterm1 Review

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
15
Converting signed numbers to decimal

• Convert 110101 to decimal, assuming this is a
  number in
• (a) signed magnitude format
• (b) 1s complement
• (c) 2s complement

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
16
Comparing the signed number systems
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
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A twos complement subtraction circuit

• A B A B 1

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
18
An adder-subtractor circuit
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
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Some other Issues

• Signed Overflow
• Sign Extension

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
20
Outline

• Addition

• Multiplication

• Subtraction

• Midterm1 Review

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
21
Midterm1 Review

• Binary-Decimal Conversion
• Circuit Analysis
• Boolean Algebra
• K-Maps
• Circuit Design
• Decoder
• Multiplexer
• Addition
• Subtraction

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
22
Binary-Decimal Conversion
Binary to Decimal
Decimal to Binary

• (10110.1011)2 ?

16 4 2 1/2 1/8 1/16 22.6875
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
23
Binary-Hexa Conversion
Hexadecimal to Binary
261.3516 2 6 1 . 3 516
0010 0110 0001 . 0011 01012
Binary to Hexadecimal
10110100.0010112 1011 0100 . 0010 11002 B
4 . 2 C16
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
24
Circuit Analysis
Find the circuits inputs and outputs
Find a Boolean expression for the circuit
Find a truth table for the circuit
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
25
Truth tables and expressions
f(x,y,z) xz yz xyz
xyz xyz xyz xyz m1 m2 m5 m7
M0 M3 M4 M6
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
26
Boolean Algebra
xy xyz xy x(y y) xyz
Distributive xy xy x(y y) x?1
xyz Axiom 7 y y 1 x xyz Axiom
2 x?1 x (x x)(x yz)
Distributive 1 ? (x yz) Axiom 7 x x
1 x yz Axiom 2
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
27
K-Maps
two-variable Karnaugh map
three-variable Karnaugh map
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
28
Three-variable K-Map
xyz xyz xz(y y) xz ? 1 xz
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
29
Circuit Design

• Clarify inputs and outputs for the circuit
• Make the truth table of the circuit
• Find a simplified boolean expression of the truth
  table (using K-map)
• Draw the circuit

CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
30
2-to-4 decoder
Q0 S1 S0 Q1 S1 S0 Q2 S1 S0 Q3 S1 S0
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
31
Design example addition

• Lets make a circuit that adds three 1-bit inputs
  X, Y and Z.
• We will need two bits to represent the total
  lets call them C and S, for carry and sum.
  Note that C and S are two separate functions of
  the same inputs X, Y and Z.
• Here are a truth table and sum-of-minterms
  equations for C and S.

C(X,Y,Z) ?m(3,5,6,7) S(X,Y,Z) ?m(1,2,4,7)
0 1 1 10
1 1 1 11
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
32
Decoder-based adder
C(X,Y,Z) ?m(3,5,6,7) S(X,Y,Z) ?m(1,2,4,7)
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
33
A 4-to-1 multiplexer
Q S1 S0 D0 S1 S0 D1 S1 S0 D2 S1 S0 D3
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
34
Implementing functions with multiplexers
f(x,y,z) ?m(1,2,6,7)
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
35
Multiplexer-based adder
When XY00, C0 When XY01, CZ When XY10,
CZ When XY11, C1
When XY00, SZ When XY01, SZ When XY10,
SZ When XY11, SZ
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)
36
THANK YOU!
CS231 Computer Architecture I (2005 Fall) Review
Session (9/29/2005) Sangkyum Kim (kim71_at_uiuc.edu)