Full%20Crate%20Test%20of%20the%20CMS%20Regional%20Calorimeter%20Trigger

1
Full Crate Test of the CMS Regional Calorimeter
Trigger

• W. H. Smith, P. Chumney, S. Dasu, T. Gorski,M.
  Grothe, M. Jaworski, J. Lackey, P. Robl,Physics
  Department, University of Wisconsin,Madison, WI,
  USA
• 9th Workshop on Electronics for LHC Experiments
• October 1, 2003
• The pdf file of this talk is available at
• http//cmsdoc.cern.ch/cms/TRIDAS/tr/0309/
  LECC03talk-wsmith.pdf
• See also CMS Level 1 Trigger Home page at
• http//cmsdoc.cern.ch/ftp/afscms/TRIDAS/html/level
  1.html

2
Trigger DAQ Systems

• Level-1 Trigger Requirements
• Input 109 events/sec at 40 MHz at full L 1034
• Output 100 kHz (50 kHz for initial running)
• Latency 3 msec for collection, decision,
  propagation

3
Calorimeter Trigger Overview
4
Calorimeter Geometry
EB, EE, HB, HE map to 18 RCT crates Provide e/g
and jet, t, ET triggers
5
Trigger Mapping
6
Calorimeter Trig. Algorithms

• Electron (Hit Tower Max)
• 2-tower ?ET Hit tower H/E
• Hit tower 2x5-crystal strips gt90 ET in 5x5
  (Fine Grain)
• Isolated Electron (3x3 Tower)
• Quiet neighbors all towerspass Fine Grain H/E
• One group of 5 EM ET lt Thr.

• Jet or t ET
• 12x12 trig. tower ?ET sliding in 4x4 steps
  w/central 4x4 ET gt others
• t isolated narrow energy deposits
• Energy spread outside t veto pattern sets veto
• Jet ? t if all 9 4x4 region t vetoes off

7
Cal. Regional Trigger Location

• Underground Counting Room
• Planned for March 05
• Central row of racks forcalorimeter trigger
• Connections via high-speedcopper links to
  adjacentrows of ECAL HCALreadout racks with
  triggerprimitive circuitry
• Readout racks connectedvia optical fiber
  throughtunnels todetector(90m fiberlengths)

7m thickshieldingwall
Rows of Racks containing trigger readout
electronics
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Regional Calorimeter Trigger- U. Wisconsin

• Data from calorimeter FE on Cu links_at_ 1.2 Gbaud
• Into 126 rearReceiverCards
• Prototypetestedw/ ASICs

• 160 MHz point to point backplane
• 160 MHz Cards 18 ClockControl ,126 Electron ID
  Receiver Cards,18 Jet/Summary Cards -- All
  Validated and in or ready for production
• Use 5 Custom Gate-Array 160 MHz GaAs Vitesse
  Digital ASICs
• Phase, Adder, Boundary Scan, Electron Isolation,
  Sort (manufactured)

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Calorimeter Trigger Racks

• Cables from central RCT Rack go through floor to
  Global Calorimeter Trigger Rack

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CMS Electronics Cavernhttp//cmsdoc.cern.ch/wsmi
th/USC55_racks.html

• Designed to minimize Latency
• Critical Level-1 Trigger Components placed
  closest to cable tunnels
• Non-time-critical components placed away from
  critical paths
• Designed to ease installation
• Components of individual detectors grouped
  together
• Large Floor to ceiling spacing to ease cable
  layout Code
• Red critical path fibers to detectors
• Green non-critical path fibers to detectors

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Second Generation Crate Backplane
VME
48V externally supplied
VME Power Supply
Std. VME Slots
Custom Point-to-point Dataflow
Custom Point-to-point Dataflow
Rear
Front

• 160 MHz with 0.4 Tbit/sec dataflow
  (point-to-point)
• Tests indicate good signal quality
• Designed to incorporate all algorithms
• Non-Isolated Electron, Tau Jet Trigger
  primitives
• Most data paths checked manually and with JTAG,
  and with loop-back cables.

12
Second Generation Clock Control Card
Clock delay adjust
DC-DC Converters

• Fans out 160 MHz clock adjusts phase to all
  boards
• Design validated - With small changes, layout and
  routing of production version completed - Ready
  for full production.

13
Backplane Clock Card Testing

• ?160 MHz TTL clock with data into 200 MHz
  Memories (2 ns scale)

14
Receiver Card

• 32 Channels
• 4 Ch. x 8 mezzanine cards
• 1.2 GBaud copper receivers
• 18 bit (2x9) data 5 bit error
• Vitesse 4-ch deserializer sends
• 120 MHz TTL to front Phase ASIC

Phase ASIC Deskew,Mux _at_ 160MHz Error bit for
each 4x4, Test Vectors Memory LUT _at_ 160 MHz Adder
ASIC 8 inputs _at_ 160 MHz in 25 ns. BSCAN ASIC
Provides Board BSCAN Diff. Output_at_160 MHz to
backplane
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Second Generation Receiver Card

• Full featured board Phase, Boundary Scan
  Adder ASICS fully validated. Production Started
  (ASIC production finished).
• Eight Boards built and tested in full crate test.
• Full quantity of mezzanine link cards (1422) are
  manufactured.

Adder
PHASE ASICs
mezz link cards
MLUs
BSCAN ASICs
DC-DC
Top side with 1 of 8 mezzanine cards 2 of 3
Adder ASICs
Bottom side with all Phase Boundary Scan ASICs
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RCT 4 x 1.2 Gbaud CopperLink Cards Serial Test
Card

• Compact MezzanineCards for each Receiver
  Card accept 4 x 20 m 1.2-Gbaudcopper pairs
  transmitting 2 cal. tower energies every 25 ns
  with low cost power.
• Uses Vitesse Link Chips (7216-01).
• Final Serial Link Test Card (STC)
• Status Already commissioned, cables, cards,
  48V PS, and support software, delivered to CERN
  in March, operating in ECAL Electronics lab
  stably with no errors for months.
• Delivered to Princeton for HCAL tests in June and
  operating stably with no errors since.
• Two pairs in use _at_ UW for testingreceiver
  mezzanine cards.

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4 x 1.2 Gbaud Copper Link Testing
20 m Cu Cable, VGA Connector
Receiver mezzanine card
ResultsBit Error rate lt 10-15
Test Transmit mezzanine card
Serial Link Test Cards
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Electron Isolation Jet/Sumary Cards
Sends top 4centralforward tau jets(12
total) Reads inHF datadirectly forinclusion
inoutput
Summarizes full crate Sorts 32 e's, 4x4 Et ? top
4 e's, jets LUTs Ex Ey from Et for 4x4
area Adder tree for Et, Ex and Ey sums Quiet/MinI
bits for each 4x4 region

• Processes 4x8 region _at_ 160 MHz
• Bckpl. Recv. Sort (if used) on ASIC
• Electron isolation on ASIC
• Lookup tables for ranking
• Takes Max in each 4x4

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Second Generation Electron Isolation Card
Full featured final prototype board is fully
validated - production underway 8 boards made and
tested as part of full crate test. Electron ID
Sort ASICs validated and production complete
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Jet/Summary Card
Receiver Mezz. Card
Phase ASIC
Backplane Two e/g per region.Region ET Sums
Cables To GCT
BSCAN ASICs
Sort ASICs
BSCAN ASICs

• Full function prototype manufactured and tested.
• Uses SORT ASICs to find top four e/g, threshold
  for muon bits, both to GCT
• Region energies to GCT
• Absorbs HF functionality with Rec. Mezz. Card, HF
  sent to GCT.
• Integration test with GCT Done - Change in
  termination - Production to start shortly

21
First Full RCT Crate

• 18 Such Crates make up the full RCT System
  covering hlt5 0 lt f lt 2p.

Rear Receiver Cards
Front Electron, Jet, Clock Cards
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Full Crate Test Program

• Receiver Card (7/crate, production 150)
• Cycle memory at speed - all paths beyond Phase
  ASIC exercised
• JTAG to test some circuits in detail
• A fraction of inputs (4 - 8) from STC
  transmitters
• Covers full data path
• Electron Isolation Card (7/crate, production
  150)
• Input by cycling RC memories
• Multiple cards (corner data by loop back cables)
• JTAG to test some circuits in detail
• Jet/Summary Card (1/crate, production20)
• Input by cycling RC memories
• Full crate with RCs EICs used
• Forward Calorimeter (HF) path test uses Serial
  Test Card transmitter
• Output to Jet Capture Card for testing (in design)

23
Testing Jet/Summary Card with Simulated Input Data

• Forward Calor-imeter (HF) path test using Serial
  Test Card trans-mitter

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Integration and Chain Tests

• Integration Tests (2003)
• Serial Test Cards for input link tests
• 1 pair at CERN for ECAL integration since March.
• 1 pair at Princeton for HCAL integration since
  June
• Remaining pairs used for production testing of
  Receiver Mezzanine Cards and data sources for
  full crate tests.
• Pre-production Prototype Full Crate tests
• Global Calorimeter Trigger (Bristol group)
  integration at Madison in August is successful -
  Termination scheme finalized
• Integration Tests (2004)
• Augment above tests with additional electronics
  from ECAL, HCAL, GCT groups as becomes
  available.
• Initiate detector tests in surface buildings

25
Conclusions

• Full Crate Tests Completed
• All pre-production prototype boards built
  validated
• All ASICs validated and production finished
• Serial Link production finished and testing
  started
• Clock/Control, Receiver, Electron Isolation,
  Jet/Summary Cards and Backplane starting
  production
• Integration tests w/ECAL,HCAL, GCT have started
• Goals for 2003/4
• Complete system production
• More integration tests
• Conduct detailed system tests (software)