Very%20Large%20Scale%20Integration%20II%20-%20VLSI%20II - PowerPoint PPT Presentation

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Very%20Large%20Scale%20Integration%20II%20-%20VLSI%20II

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www.vlsi.itu.edu.tr. Place and Route Using Encounter. Copy synthesized Verilog file and sdc ... amsPowerRoute {{vdd! 5} {gnd! 5}} 11/23/09. 17. www.vlsi.itu.edu.tr ... – PowerPoint PPT presentation

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Title: Very%20Large%20Scale%20Integration%20II%20-%20VLSI%20II


1
Very Large Scale Integration II - VLSI II Place
and Route Using Encounter Hayri Ugur UYANIK ITU
VLSI Laboratories Istanbul Technical University
2
Place and Route Flow
  • Database Setup
  • Import Design
  • Load Constraints
  • Design Floor Plan
  • Design Power Plan
  • Place Cells
  • Specify I/O Locations
  • Generate Clock Tree
  • Fill In The Blanks
  • Route
  • Export Design

3
Place and Route Using Encounter
  • Make a new folder

4
Place and Route Using Encounter
  • ams_encounter tech c35b4 vn TOP_syn.v vt TOP

5
Place and Route Using Encounter
  • Copy synthesized Verilog file and sdc

6
Place and Route Using Encounter
  • Edit sdc and delete the shown line

7
Place and Route Using Encounter
  • Start encounter by typing encounter

8
Place and Route Using Encounter
  • source gemma.tcl

9
Place and Route Using Encounter
  • amsDbSetup

10
Place and Route Using Encounter
  • amsUserGrid

11
Place and Route Using Encounter
  • amsGlobalConnect core

12
Place and Route Using Encounter
  • amsOpCond minmax

13
Place and Route Using Encounter
  • amsLoadCons all

14
Place and Route Using Encounter
  • amsFloorplan core 0.6 12 1

15
Place and Route Using Encounter
  • Floorplan

16
Place and Route Using Encounter
  • amsPowerRoute vdd! 5 gnd! 5

17
Place and Route Using Encounter
  • Power Route

18
Place and Route Using Encounter
  • Add Stripes

19
Place and Route Using Encounter
  • Stripe Properties

20
Place and Route Using Encounter
  • Power plan with stripes

21
Place and Route Using Encounter
  • Can delete some stripes with delete key

22
Place and Route Using Encounter
  • amsAddEndCaps

23
Place and Route Using Encounter
  • End Caps

24
Place and Route Using Encounter
  • amsPlace ntd

25
Place and Route Using Encounter
  • Placed Design

26
Place and Route Using Encounter
  • Save I/O File for Editing

27
Place and Route Using Encounter
  • Save I/O File as TOP.io
  • Edit File with nedit

28
Place and Route Using Encounter
  • loadIoFile TOP.io

29
Place and Route Using Encounter
  • I/O are placed

30
Place and Route Using Encounter
  • Clock ? Design Clock

31
Place and Route Using Encounter
  • Gen Spec
  • Select CLK_BUF and DLY Cells, click Add

32
Place and Route Using Encounter
  • Change path and click OK
  • Click Cancel

33
Place and Route Using Encounter
  • amsCts

34
Place and Route Using Encounter
  • Display Clock Tree

35
Place and Route Using Encounter
  • Display Clock Tree

36
Place and Route Using Encounter
  • Clock Tree

37
Place and Route Using Encounter
  • Clear Clock Tree Display

38
Place and Route Using Encounter
  • amsFillcore

39
Place and Route Using Encounter
  • Design is Filled

40
Place and Route Using Encounter
  • amsRoute wroute

41
Place and Route Using Encounter
  • Zero violations

42
Place and Route Using Encounter
  • Design is routed

43
Place and Route Using Encounter
  • amsWrite final
  • (GDS, Verilog etc.)
  • amsWriteSDF
  • (SDF file)

44
Place and Route Using Encounter
  • In icfb.exe,
  • File ? Import ? Stream

45
Place and Route Using Encounter
  • Stream In parameters

46
Place and Route Using Encounter
  • Stream In Options

47
Place and Route Using Encounter
  • Layout is ready
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