??????????? ???????? ??????? ???????? ??????, ????????????????? ???????????????? ???????? ????????? (Algorithmic State Machines, ASM) - PowerPoint PPT Presentation

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Title:

??????????? ???????? ??????? ???????? ??????, ????????????????? ???????????????? ???????? ????????? (Algorithmic State Machines, ASM)

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... implemented by ABELITE ('Actual output').This actual output ... System/Logic Design by Abelite (Prof. Samary Baranov, Holon Institute of Technology, Israel) ... – PowerPoint PPT presentation

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Title: ??????????? ???????? ??????? ???????? ??????, ????????????????? ???????????????? ???????? ????????? (Algorithmic State Machines, ASM)


1
??????????? ???????? ??????? ???????? ??????,
????????????????? ???????????????? ????????
????????? (Algorithmic State Machines, ASM)
  • ?.?. ???????? ???????? ??????? ??????????? ???,
    ??????

2
Total design cost reducing
  • A work of a designer is resulted in two or three
    activities and human/equipment resources which
    have been spent for one of them should be kept
    back in another.

3
Algorithmic State machine (ASM)
  • An Algorithmic State Machine (ASM) is the
    directed connected graph containing an initial
    vertex (Begin), a final vertex (End) and a finite
    set of operators and conditional vertices.
  • The operators and conditional vertices have only
    one input, the initial vertex has no input.
    Initial and operator vertices have only one
    output, a conditional vertex has two outputs
    marked by "1 and "0". A final vertex has no
    outputs. Each operator include some body in a
    pseudocode, and its execution takes a clock of
    the target system time
  • The following are the major steps in the ASM
    methodology
  • Describe the target system algorithm by ASM
    chart (using a pseudocode),
  • Design the datapath based on the ASM chart,
  • Design the control logic based on the detailed
    ASM chart,
  • If followed correctly, the ASM method produces a
    hardware design in a systematic and logical
    manner
  • ?? Very robust and easily modified
  • ?? Refined through design iterations

4
ASM Example
  • Let us an operator Yb be implemented. The
    sequence of the actions after Yb can be
    represented by ASM as following
  • The operator Y3 is executed after Yb when
    x1x4x31,Y1 is executed afterYb when x1x31,
  • Y5 is excuted after Yb when x1x4x31 or x11,
    that is
  • Yb? x1x4x3Y3
    x1x4x'3Y5 x1x'4Y1 x'1Y5

5
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6
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7
Reuse and Decomposition
Each gray box is an ASM description of some
operations (macro-instructions). Arbitrary
numbers of nesting are allowed.
8
???? PCI2AXI
  • ???????????????? ???? (? ??????????? ????????
    ???????????) (bridge). ???????? ?????? ????? -
    ???????? ?????? ????? ????? ?????? PCI AXI
  • ?????? ? PCI ?? AXI. ??? ??????????? ??????????
    PCI ? ? ???????????? ? ???????????? AXI2PCI ?
    ????? ??????????? ???????????? ??????. ????? ???
    ??????????? ???????? AXI2PCI ? ???????????? ?
    ??????? AXI, ????? ???????????.
  • ?????? ? AXI ?? PCI. ????????? PCI ???????????
    ?????? ? ??????????? AXI2PCI, ??????? AXI2PCI
    ??????????? ?????? ? ???????? AXI. ????? ???
    ??????????? ???????? AXI2PCI ? ? ???????????? ?
    ??????? AXI, ?????? ??????????? ? ?????. ?????
    ????? ??? ??????????? ?????????? PCI ? ?
    ???????????? ? ???????????? AXI2PCI, ??????
    ??????????? ?? ??????.

9
??????
  • ?????????
  • ????????? PCI (Initiator) ???????? ?????? ??
    ?????? ? ?????????? (??????????? AXI2PCI) ???
    ??????????? ?? ??????.
  • ??????????? PCI (Target) ????????? ?????, ?
    ??????? ?????????? ?????? ?? ?????? ??
    ??????????? (????????? AXI2PCI) ??? ?????????????
    ?? ??????.
  • ??????? AXI (Master) ????????? ????????,
    ??????? ???????? ?????? ?? ?????? ? ??????????
    (??????? AXI2PCI) ??? ??????????? ?? ??????.
  • ??????? AXI (Slave) - ????????? ?????, ? ???????
    ?????????? ?????? ?? ?????? ?? ???????????
    (??????? AXI2PCI) ??? ????????????? ?? ??????.
  • ??????
  • ?????? ? PCI ?? AXI. ??? ??????????? ??????????
    PCI ? ? ???????????? ? ???????????? AXI2PCI ?
    ????? ??????????? ???????????? ??????. ????? ???
    ??????????? ???????? AXI2PCI ? ???????????? ?
    ??????? AXI, ????? ???????????.
  • ?????? ? AXI ?? PCI. ????????? PCI ???????????
    ?????? ? ??????????? AXI2PCI, ??????? AXI2PCI
    ??????????? ?????? ? ???????? AXI. ????? ???
    ??????????? ???????? AXI2PCI ? ? ???????????? ?
    ??????? AXI, ?????? ??????????? ? ?????. ?????
    ????? ??? ??????????? ?????????? PCI ? ?
    ???????????? ? ???????????? AXI2PCI, ??????
    ??????????? ?? ??????.

10
  • ?????? ? AXI ?? PCI. ??? ??????????? ???????? AXI
    ? ? ???????????? ? ??????? AXI2PCI ? ?????
    ??????????? ???????????? ??????. ????? ???
    ??????????? ?????????? AXI2PCI ? ???????????? ?
    ???????????? PCI, ????? ???????????.
  • ?????? ? PCI ?? AXI. ??????? AXI ???????????
    ?????? ? ???????? AXI2PCI, ????????? AXI2PCI
    ??????????? ?????? ? ??????????? PCI. ????? ???
    ??????????? ?????????? AXI2PCI ? ? ???????????? ?
    ???????????? PCI, ?????? ??????????? ? ?????.
    ????? ????? ??? ??????????? ???????? AXI ? ?
    ???????????? ? ??????? AXI2PCI, ??????
    ??????????? ?? ??????.

11
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12
ASM-based verification
13
ASM-based verification (contd.)
  • Translated ASM model is converted automatically
    in VHDL/VERILOG test bench of a behavior model
    of the target system, which is simulated by a
    well known tool, e.g. by ModelSim (Mentor
    Graphic).
  • The detected output is the desirable behavior of
    the target system which should compare with the
    result of the structural synthesis , implemented
    by ABELITE (Actual output).This actual output
    is also the result of simulation by the same
    tool, e.g. ModelSim.

14
(No Transcript)
15
(No Transcript)
16
??????? ????? ?????????? ???????????? ???PCI2AXI
Bridge
  • ?????????????? ???????? ?????????? ?????????
    ??????? ????????? ? ???????????, ??????????
    ??????????, ? ?.?.
  • IRDY (Initiator Rdy) ? ?????? ?????? ??????
    ??????? ??? ?????????? ????? ?? bus Master, ??
    ????? ?????? ?????????? Master ?????????
    ??????.
  • FRAME ?????????? ?????? ??????? ?????, ??????
    ???????? ???? ???????? ??????
  • CTL ??????? ????????? ???????? FRAME ?????? ????
    ????????? ?????? IRDY

17
?????????? ???????????(contd.)
  • ????? Master ??????????? ?????????? ?? ?????
    ???????? ??????,Target ?? ?????? ??????
    ????????????? ?? ??????? ? ????? ?????? ??????
  • REQx (Request) ????? ?? master ? ??????????
    ????????

18
  • ???????? ????????? (??????? ?????? ) ? ????????
    ???????? K lt S, R, L, S0 gt, ??? S ?????????
    ?????????, R S?S-????????? ??? ?????????,
    ????? ???????? ???????? ???????? (complete
    transition relation) L S ? 2AP ???????,
    ??????? ??????????? ??????? ????????? ?? ??? ????
    ?????????? ??????? (?????????? ?? CTL), ????????
    ? ???? ????????? ( ????????????? ?????), S0
    S ????????? ????????? ?????????.
  • ???? ????? ???????? ??????? ???? MltS, I,O, d,?,
    gt, ??? I i,O, d, ? , S 0- ?????, ??????,
    ??????? ????????? (d) ? ??????? (?)
    ??????????????, ?? c???????? ?????? ???
    ????????? ???????? ????? ????? ???

19
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20
??? ????????, ???????????? ??????? ?? ?????? 3
(, ??? rst-?????? reset (????????????? ???
??????? ???????? ? 0 ??? rst1), ? cnt- ??????
?????????????

21
System/Logic Design by Abelite(Prof. Samary
Baranov, Holon Institute of Technology, Israel)
ASM-description
FSM
FSM
Micro operations
RTL (VHDL)
Design Tools (SYNOPSIS, CADENCE
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