High Speed Electrical Testing

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(No Transcript)
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High Speed Electrical Testing

• Jim Choate
• Intel Corporation

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Agenda

• Electrical Testing Goals
• Test Modes
• Electrical Testing Procedures
• Problems to Avoid
• Summary

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Goals of the ElectricalCompliance Program

• High Quality USB Products
• Stable, Repeatable, Well Documented Tests
• Documented Equipment Setups
• Documented Test Procedures
• Documented Test Assertions and Descriptions
• Leverage USB FS/LS Electrical Tests
• FS and LS Electrical Testing (LS for downstream
  ports)
• Inrush
• Drop and Droop

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New Testing Areas

• USB High Speed Electrical Testing Starts at a
  High Level

• Electricals
• High Speed Signal Quality
• Time Domain Reflectometry (TDR)
• Receiver Sensitivity and Squelch
• J and K Voltage Levels
• ChIRP

• Disconnect thresholds
• Packet Parameters
• Suspend/Resume
• High Speed Hub Parameters
• Sync truncation
• EOP dribble
• etc

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USB HS ElectricalTest Modes

• High-speed Capable Devices/Hubs Must Support Test
  Modes

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General HS ElectricalTest Procedure

• Connect Device Under Test To Test Port on Fixture
• Configure DUT With Test Mode SW
• Isolate DUT from Host with High Speed Relay
• Make Appropriate Electrical Measurements

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New Test Fixture(s)
Diff Probe
Data Generator

• Signal Quality
• TDR
• Receiver Sensitivity
• ChIRP
• J and K Levels
• Disconnect threshold
• Packet parameters
• Suspend Resume
• Test Modes

90 Ohms
Initialization Port
Test Port
HS Relay
Vbus1
Vbus2
Power Selection Ckt
Vcc
Gnd
USB HS Test Fixture
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New Test Fixture(s)
Isolation relay power
Diff Probe Test Point
Test Switch
Test Port
Init Port
To Host Controller
To Device Under Test
High Speed Device Signal Quality Test Fixture
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HS Signal QualityTest Procedure
Oscilloscope

• Put Device in Test Mode Test_Packet
• Flip Test Fixture Relays To Route Output to90
  Ohm Termination
• Capture Waveformon oscilloscope
• Analyze data
• Data analysis is performed by generating an eye
  pattern

USB HS Test Fixture
90?
HS Relay
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Eye Pattern Generation

• Time vs. voltage test packet data is transferred
  from scope to PC through GPIB

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Eye Pattern Generation

• Signal analysis scripts determine data rate from
  zero volt crossovers
• Crossovers indicated at zero crossings below

• Mean bit time calculated
• Reference frame created from mean

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Eye Pattern Generation

• Reference frame position is optimized by
  minimizing least squares error betweenreference
  frame and actual crossovers

Reference points between runs ignored
Optimized reference point
Actual crossover
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Eye Pattern Generation

• Data is parsed into bit time internals using
  optimized reference frame
• Eye pattern created from bit time intervals

1 bit time
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Passing Eye Pattern

• Example of passing High Speed Eye - Host
  Controller at TP2

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Failing Eye Patterns

• Min/Max voltage level failure
• Caused by out of spec HS termination

• Jitter failure
• Caused by noise from power supply

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HS Device Receiver Sensitivityand Squelch Test
Procedure
Data Generator

• DUT is Placed In Test_SEO_NAK Test Mode using
  Test Mode SW
• The test fixture replaces the host by switching
  the connection to the Data Generator
• Data GeneratorGenerates IN Packets
• Device Must Respondfor In Spec Packets
• Device Must Not Respond to Out of Spec Data
  Generator Output

Test Mode SW
USB 2.0 Test Fixture
SMA
HS Relay
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HS Device Receiver Sensitivity and Squelch Test
Results

• Device response to nominal packets

• Device response to minimum packets

• Device must not respond to packets below squelch
  threshold

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TDR Test Procedure
TDR

• Device Under Test Placed In Test_SEO_NAK Mode
• Relay Switches Idle Data Lines to TDR
• TDR BroadcastsTest Signal
• TDR MeasuresSignal Reflections To Determine
  Termination And PCB Impedance

Test Mode SW
USB 2.0 Test Fixture
SMA
HS Relay
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TDR Test Procedure

• Determining connector reference location
• TDR connected to test fixture
• Test fixture disconnected from device under test
• Voltage step occurs at connector end (open step)

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TDR Test Procedure

• Measuring TDR response

ZHSTERM 80 to 100 Ohms (yellow region)
USB connector
ZHSTHRU 70 to 110 Ohms (red cursors)
Excursion of ZHSTHRU passes using exception
window
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TDR Test Procedure

• TDR Test Fails
• Cause Using a ribbon cable between the PCB USB
  connector

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Other Test Modes

• Test_J Test_K
• Port enters and remains in the high-speedJ or K
  state
• Allows testing of output voltage and
  impedancewhen each output is high or low
• Test Force Enable
• Allows testing disconnect

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Conclusions

• High Speed Electrical Testing is Comprehensive
• Electrical Testing
• HS Signal Quality
• TDR
• Receiver Sensitivity
• Suspend/Resume
• Repeater Testing
• Sync truncation, EOP dribble, etc
• Well Documented Tests
• Test Procedures
• Test Specifications