Chapter 3 Introduction to the 68000

1
Chapter 3Introduction to the 68000

• Register Set data, address, condition code,
  status.
• Basic Instruction Set
• Basic addressing modes register, absolute,
  immediate, register indirect, etc.
• Assembling and debugging a program

2
Register Set

• 8 general-purpose data registers. Word operation
  on D00-D15, byte operation on D00-D07

• PC points at the next instruction to be
  executed. 31
  00

3
Address Register A0-A7

• 8 address registers of 32 bits.
• Information in an address register represents a
  location in memory.
• Special one A7 is used as stack pointer.

M(A0) M(1005) 57
4
Condition Code Register

• The CCR is updated to reflect the result of the
  operation.
• Z1 if the result is 0
• C1 if there is carry-out from MSB
• V1 if there is overflow
• N1 if the result is negative

5
Instruction Set

• The 68000 has a large instruction set.
• Move data
• Modify or operate the data
• Change execution sequence
• Determine the operation mode of CPU
• e.g. MOVE.B D3,1234
• MOVE.B 25,D2
• Classification of instruction set architecture
• CISC (Complex instruction set computer) large
  instruction set, powerful, but difficult to
  optimize code
• RISC (Reduced instruction set computer)
  smaller instruction set, easy to optimize code,
  but longer program

6
Data Movement

• Register-to-register, register-to-memory,
  memory-to-register, memory-to-memory,
  constant-to-memory/register.
• 8-bit, 16-bit, 32-bit correspond to MOVE.B,
  MOVE.W, MOVE.L
• Legal Assembler Form RTL
• MOVE.B D1,D2 D2 ? D1
• MOVE.B D3, 1234 M(1234) ? D3
• MOVE.B 1234,2000 M(2000) ? M(1234)
• MOVE.B 12,1234 M(1234) ? 12
• Illegal MOVE.B D3,12 12 ? D3 ???

7
Unconditional Branch

• BRA Branch
• BRA address GOTO address
• Example
• BRA NEXT
• MOVE.B D1,D2
• NEXT MOVE.B 1,D4
• Which instruction will be executed after BRA NEXT
  is executed?

8
Conditional Branch

• BEQ, BNE, BCC, BCS, BVS
• Example
• BCC Check_5 IF c0 THEN branch to Check_5
• MOVE.B D1,D2
• Check_5 MOVE.B 1,D4

9
Conditional Branches (con.)

• BNE Branch on CCR(Z)0
• BEQ Branch on CCR(Z)1
• BCC Branch on CCR(C)0
• BCS Branch on CCR(C)1
• BVC Branch on CCR(V)0
• BVS Branch on CCR(V)1
• The complete set of 68000 conditional branch
  instructions is given in Table 5.2 on page 208.
  (e.g., BLT, BLE, BGT, BGE, etc.)

10
CMP and TST

• Useful for changing program flow
• CMP Compare
• Syntax CMP src,Dn
• Operation Dn - src
• Result of - is not saved
• TST Test an operand
• Syntax TST dest
• Compare dest to 0, no result saved
• TST D1 is the same as CMP __,D1

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IF X1 0 THEN X1 Y1
Change Program Flow
IF1 Set Flag Test Opposite Condition
and BR to ENDIF if
TRUETHEN1 IF-PartENDIF1 ...

• IF1 MOVE.B X1,D0 (or TST.B X1)
• BNE ENDIF1
• THEN1 MOVE.B Y2,X1
• ENDIF1 other code

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IF X1 0 THEN X1 Y1 ELSE X1 Y2
Change Program Flow (con.)
Right IF1 MOVE.B X1,D0 BEQ THEN1 ELSE1
MOVE.B Y2,X1 BRA ENDIF1 THEN1 MOVE.B
Y1,X1 ENDIF1 ...

• Wrong
• IF1 MOVE.B X1,D0
• BEQ THEN1
• ELSE1 MOVE.B Y2,X1
• THEN1 MOVE.B Y1,X1
• ENDIF1

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IF X1 0 THEN X1 Y1 ELSE X1 Y2
Change Program Flow (con.)
IF1 MOVE.B X1,D0 BNE ELSE1 THEN1
MOVE.B Y1,X1 BRA ENDIF1 must have this
branch ELSE1 MOVE.B Y2,X1 ENDIF1 ...
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WHILE (K gt 0) DO S
Change Program Flow (con.)
WHILE TST.B K BLE ENDWH test
opposite condition S loop body BRA
WHILE ENDWH ...
15
FOR I N1 TO N2 DO S
Change Program Flow (con.)
MOVE.B N1,D0 D0 loop
counter NEXT CMP.B N2,D0 BGT
ENDFOR S loop body ADD.B
1,D0 BRA NEXT ENDFOR ...
16
1 assembly language instruction 1 machine
language instruction

• 1 high-level language instruction ? 1 machine
  language instructions

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Subroutine

• BSR ADD12
• BSR ADD12
• ADD12 ADD.B D1,D2
• SUB.B 12,D2
• RTS

18
Data Typing

• Most high-level language, like Pascal, Java, Ada,
  are said to be strongly typed.
• Assembly language is not strongly typed.
• How about C/C?
• Example A character can be multiplied by an
  integer.
• JAVA?

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Data Typing (con.)
Memory Map
12
00
A 1000
ORG 1000 A DC.B 12 B DC.W 3456 C DS.B 1 D DS.L
1
34
56
B 1002
C 1004
00
00
00
00
D 1006
00
00
MOVE.B A,D0 ADD.B B,D0 D0 ? 12 34
MOVE.B A,D0 ADD.W B,D0 D0 ? 12 3456
MOVE.W A,D0 ADD.W B,D0 D0 ? 1200 3456
MOVE.L A,D0 ADD.L B,D0 D0 ? ?
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Arithmetic Operation

• ADD, SUB, CLR, NEG, ASL, ASR
• ADD.B 1234,D3 D3 ? M(1234)D3
• The CCR is updated accordingly.
• Example V3 V1 V2
• signed integers unsigned integers

Data
Are the codes correct?
Program
Where is the right place for BVS/BCS?
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Arithmetic Operation (con.)

• Subtraction SUB src, dest dest ? dest -
  src
• SUB.B D2,D0 D0(07) ? D0(07) - D2(07)
• SUB.W D2,D0 D0(015) ? D0(015) -
  D2(015)
• SUB.L D2,D0 D0 ? D0 - D2
• Clear
• CLR.B D0 D0(07) ? 0
• Negation negative value, i.e,, 2s complement
• NEG.B D4 2s complement of D4
• If D4 01101100, after D4 10010100

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ASL (Arithmetic Shift Left)
Operand
0

• Format
• ASL n,dest
• or
• ASL Di,dest
• shifts bits in dest LEFT by n or Di
  places, respectively
• The bit shifted out is shifted in C-bit of CCR.
• Example ASL.B 3,D0
• D0 0 1 0 1 1 1 0 0
• C0 1 0 1 1 1 0 0 0
• C1 0 1 1 1 0 0 0 0
• C0 1 1 1 0 0 0 0 0

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ASL (Arithmetic Shift Left)

• Why is ASL useful?
• ASL is the fastest way to perform
• multiply by 2s power
• ASL dest ASL 1,dest
• What does ASL n, dest do?
• dest ? dest x 2n

Can ASR cause overflow?
24
ASR (Arithmetic Shift Right)

• Same as ASL, but
• bits shifted to RIGHT
• MSB is duplicated back into MSB (Why?)
• ASR.B 1,D0 is equivalent to dividing D0 by 2

How to divide D1 by 32 ?

• Example D0 -22 11101010
• After ASR.B 1,D0
• D0 11110101 -11
• CCR(c) 0

Can ASR cause overflow?
25
Effect of Arithmetic Operations on CCR

• Addition
• ? 1, if carry out from MSB
• C ?
• ? 0, otherwise
• ? 1, if operands are of same sign and
• V ? their sum is of the opposite sign
• ? 0, otherwise

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Effect of Arithmetic Operations on CCR

• Subtraction
• ? 1, if NO carry out from MSB
• C ?
• ? 0, otherwise
• ? 1, if operands are of opposite sign and
• V ? the result is of same sign as the source
• ? 0, otherwise

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Logical Operation

• AND, OR, EOR, NOT
• If D0 11110000
• AND.B 10100110,D0 D010100000
• OR.B 10100110,D0 D011110110
• EOR.B 10100110,D0 D001010110

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Use Registers

• Accesses to data registers are faster than
  accesses to memory.
• Shorter instruction, 3 bits to indicate either
  one of 8 general-purpose registers.
• Use comments to indicate how registers are used
  in program.

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Addressing Modes

• Concerned with the way in which data is accessed
  (where operand can be found)
• Data register direct, absolute, immediate, and
  address register indirect.
• Looking for a house in a familiar neighborhood,
  The house next to Tims (relative location) is
  enough.
• Looking for a house in a new environment, 61
  William Street (actual address) is necessary,
  even with a city name.

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Absolute Addressing

• Use the actual or absolute address of the
  operand, e.g. CLR.B 234
• MOVE.B D2, 2000
• The source is data register direct, a type of
  absolute addressing mode. 2000 is memory
  location 2000
• Symbols can also be used
• Example

31
Immediate Addressing

• MOVE.B 25,D2 D2 ? 25
• Immediate addressing is faster than the absolute
  addressing.
• Data 25 is part of the instruction ? stored in
  IR.

Immediate Addressing Hours EQU 25 ADD.B
Hours,D2
What about ADD.B Hours,D2
What about ADD.B Hours,D2
32
IF 7ltPlt25 THEN X 6if ((7ltP) (Plt25))
X 6

• MOVE.B P,D0
• CMP.B 7,D0
• BLE OutOfRange
• CMP.B 25,D0
• BGE OutOfRange
• MOVE.B 6,X
• OutOfRange

CLR.B D1 D1 X MOVE.B 1,D0 D0
I NEXT ADD.B D0,D1 ADD.B 1,D0 CMP.B
10,D0 BLE NEXT MOVE.B D1,X
X 0FOR I 1 TO 10 X X IX
0for (I 1 I lt 10 I) X X I
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Address Register Indirect

• The address of an operand is found in an address
  register, A0 to A7
• Pointer or reference
• MOVEA copy an address to address reg
• MOVEA.L 1000,A0
• CLR.B (A0)
• same effect as
• CLR.B 1000

34
Indirect Addressing

• Two accesses
• 1) to the address register A0 to find the actual
  address of operand, 1000.
• 2) to the memory location 1000 to get the
  operand.
• Why is address register indirect addressing
  useful?

35
Example Add 100 numbers together, the data
starts at memory location 200016

• MOVE.B 2000,D0
• ADD.B 2001,D0
• ADD.B 2002,D0
• ADD.B 2003,D0
• ADD.B 2063,D0

CLR.B D0 MOVEA.L 2000,A0 NEXT ADD.B
(A0),D0 ADDA.L 1,A0 CMPA.L
2064,A0 BNE NEXT
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Different Addressing
1 Program to
test the different addressing modes. 2
D2 ? M(0) 26. By
Mingrui Zhang 3 4
00001000
ORG 1000 5 00001000 1A ABSOL
DC.B 26 6 0000001A IMMED
EQU 26 7 8
00002000 ORG
2000 9 00002000 207C00001000 MOVEA.L
1000,A0 10 00002006 24380000
MOVE.L 0,D2 11 0000200A D410
ADD.B (A0),D2 12
13 0000200C 24380000
MOVE.L 0,D2 14 00002010 D4381000
ADD.B ABSOL,D2 15
16 00002014 24380000
MOVE.L 0,D2 17 00002018 0602001A
ADD.B IMMED,D2 18
19 0000201C 4E722700
STOP 2700 20 00002000
END 2000
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The Teesside MC68000 Cross-assembler and Simulator
TOOLS FILES text editor Test.X68 X68K
Test.BIN (and Test.LIS) E68K
38
Debugging Commands

• HELP Provide information about commands
• MD (.) Displays the contents of memory
• e.g. MD 400
• MD 400 -DI disassemble the contents of
• memory.
• MM Memory modification
• e.g. MM 400 -B MM 2100 -W
• MM 400 -B -DEC MM 2100 -W -DEC
• DF Displays the contents of all registers
• .PC set PC
• e.g. .PC 400
• GO Execute program, (ESC to escape)
• TR Executes a single instruction at a time
• BR 10000 Places a marker at location 10000
• QU Quit