How To Choose The Right Flash Memory For Your Embedded Application.

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How to Choose the Right Flash Memory for your
EmShbeadreded Application.
How To Choose The Right Flash Memory For
YToabuleroEf Cmonbteentdded Application.

• History of Flash Memory
• What is a Flash Memory?
• Types of Flash
• NAND Flash vs NOR Flash
• Architecture
• Memory Density
• Write/Erase/Read Performance
• NAND Flash
• Raw NAND
• Managed NAND
• Bad Block Management
• Error Code Correction
• Wear Leveling
• Managed NAND Examples
• Wear Estimation of NAND Flash
• Write ampli cation factor
• TBW with typical WAF
• References

2
3/8/23, 118 PM Flash Memory for your Embedded
Application - Oxeltech What Is A Flash Memory ? A
non-volatile electronic memory storage media is
known as ash memory. The term non- volatile
memory refers to memory that retains data even
aOftexr tehelstysteecmhis turned o . Its
employed in a wide range of devices and allows
users to easily wipe and reprogram data.
ExaSmhpalrees of ash memory include digital audio
players, personal computers, mobile phones,
digital cameras, synthesizers, industrial
robotics, video games, scienti c instrumentation,
and medical electronics. Types Of Flash There
are two types of ash available one is called NOR
ash and the other is the NAND ash. NAND ash is
further categorized into raw NAND and managed
NAND. These NOR and NAND ashes got their names
from the logic gate they made up of, thats why
each has a di erent architecture and
specialties. NAND Flash Vs NOR Flash When
choosing a Flash memory, embedded system
designers must evaluate several factors,
including the type of Flash, architecture to
utilize, whether to use a serial or parallel
interface and whether or not error correction
code, wear leveling, etc is required. If just one
type of interface is supported by the processor
or controller, the alternatives are limited,
making memory selection easier. Architecture NOR
ash is designed for random access, which means
it can access data in any order and does not
need the user to follow a list of storage
locations. Each NOR Flash memory cell is
connected in parallel in its internal circuit
one end of the memory cell is connected to the
source line, while the other end is connected to
the bit line as shown in Figure 1. The system
can now access individual memory cells as a
result of this. This provides the bene t of
random access and quick read speeds, making this
an ideal choice for code execution 2 .
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Flash Memory for your Embedded Application -
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Figure 1 NOR and NAND internal structure 3 On
the other hand, NAND ash is designed for
high-density storage of data rather than random
access. NAND Flash cells, unlike NOR Flash, are
connected in a series to the bit line called a
string, generally eight memory transistors at a
time. The drain of one cell is linked to the
source of the following cell in this con guration
as shown in Figure 1. Because of the series
connection, the number of ground wires and bit
lines is reduced, and it has a lower cell size
as a result of this architecture. Direct access
to individual cells is not possible, however 2
. Memory Density Because NAND Flash has greater
densities, it can store signi cantly more data.
NAND Flash memory capacity range from 128MB to
2TB. This makes it ideal for data storage devices
like Flash drives, digital cameras, and USB
drives. NAND has smaller memory cells and can
scale due to its higher densities 2 . In
contrast to NAND, NOR Flash has a lower density
and hence a lesser memory capacity. The density
of NOR Flash memory generally ranges from 64MB to
2GB. As a result, NOR ash is be er suited to
low-capacity, high-reliability applications, such
as storing code in mobile phones and medical
equipment. Furthermore, NOR has a bigger memory
cell size than NAND, which restricts its scaling
possibilities 2 .
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3/8/23, 118 PM Flash Memory for your Embedded
Application - Oxeltech Write/Erase/Read
Performance The construction of NOR and NAND
Flash has an impact on how well they write,
erase, and read data. Short read times are
possible because NOR FlasOh mxemeolrty ceelcls
hare wired in parallel and may be accessed
immediately.
However, NOR Flashs capacity to write and erase
as rapidly as NAND Flash is hampered by its
bigger cell size and more complex erasing
procedure. 2 .
Share
In contrast, NAND memory cells, are connected in
a series that is divided into pages, which are
then sub-organized into blocks. NAND readings
are slower because it provides page and blocks
access rather than random access hence, not able
to read each byte separately. NAND writes and
erases are, nonetheless, faster than NOR. 2 .
Feature NOR Flash NAND Flash
Cost per bit Higher Lower
Random read speed Faster Slower
Write speed Slower Faster
Erase speed Slower Faster
Power on current High Low
Standby current Low High
Bit ip Less common More Common
Bad block while shipping 0 Up to 2
Bad block development Less frequent More frequent
Bad block handling Not mandatory Mandatory
Data retention Very high Lower
Program-erase cycle Lower Higher
Preferred application Code storage and execution Data Storage
Table 1 Characteristics Comparison of NOR ash
and NAND ash 4
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Flash Memory for your Embedded Application -
Oxeltech
NAND Flash There are two primary types of NAND
ashes Raw NAND and Managed NAND. A NAND ash
Oxel tech
device can be broken up into three distinct parts.
Cell The tiniest of things. The device managing
the NAND storage cannot directly address a cell
since it stores data at the bit
level. Share Page For reading and writing
operations, the smallest array of cells may be
addressed. The ipping of bits from the value
1 to the value 0 is a program operation. Page
sizes are measured in kilobytes, for example, 4
KB. Block The smallest array of pages to which
erase operations can be addressed. In some
cases, a block is also referred to as an erase
block. Block sizes are measured in megabytes, for
example, 4 MB. Over time, erase operations
degrade ash storage. When a block can no longer
be used to store data, it is labeled as a bad
block. The most essential takeaway from the
preceding points is that blocks deteriorate as
they are erased. The number that indicates how
many times each block has been erased is known as
the block erase count 5 .
Figure 2 Raw NAND ash die 5 Raw NAND Raw
NAND does have the lowest cost per bit, but all
management operations must be performed by a
separate host controller (not included in the
package). Bits are stored in a cell, which is
the smallest unit. During a read operation, the
voltage level thresholds it can retain and
distinguish determine how many bits are saved per
cell. The number of bits that the cells can
store is indicated by various ash memory identi
ers 5 . SLC single-level cell, stores 1 bit per
cell
6
3/8/23, 118 PM Flash Memory for your Embedded
Application - Oxeltech MLC multi-level cell,
stores 2 bits per cell TLC triple-level cell,
stores 3 bits per cell QLC quad-level cell,
stores 4 bits per cell There is a trade-o between
density, cost, endurance, andOpexrfoerml atnecec,
shummarized in Figure 3. Share
Figure 3 Characteristics of NAND ash 6
Managed NA ND Managed NAND includes memory
management into the package, simplifying the
design-in process 7 . Managed NAND is a combo of
raw NAND ash SLC or MLC and a hardware
controller that performs ash management functions
such as Wear levelling Bad block management ECC
(Error Code correction)
Figure 4 Raw VS managed NAND 8 Bad Block
Management Due to production limits, NAND Flash
devices are sold with faulty blocks sca ered
around. Before delivery, the locations of these
initial faulty blocks are noted in the Flash
device itself.
7
3/8/23, 118 PM Flash Memory for your Embedded
Application - Oxeltech It is best to avoid using
these bad blocks since they can cause damage to
other good blocks. The information from these
early defective blocks is stored in a bad block
table on the host system 9 . Oxel tech Due to
memory wear, NAND Flash devices will gather
faulty blocks during their lifetime. When a
program or wipe operation reports Fail in the
status register, these extra faulty blocks can
be fSohuanrde. Failure to program one page in a
block has no impact on the other pages in the
block. Other pages in the blocks content are
transferred to another good block, and the old
block is labeled as bad. The host system
records this information in the bad block table
to prevent the block from being used again 9 .
Figure 5 Bad Block Management 10 Error Code
Correction In Flash memory, bit- ipping refers to
data corruption caused by occasional errors, in
which the status of a bit seems to be
ipped. Any such aws must be detected and
corrected to protect the integrity of stored
data. ECC (Error Correction Code) technology is
a method of detecting and correcting faults in
memory devices. Error correction codes locate
and rectify errors by adding redundant bits to
data bits. For every m-bits of data, k-bits of
redundant bits are added, resulting in mk bits
of e ective data or coded data. When an invalid
codeword is found, the ECC method will encode
these mk bits, allowing any fault in the
received data to be identi ed. A found error can
be recti ed based on the ECC algorithms
capabilities.
8
3/8/23, 118 PM Flash Memory for your Embedded
Application - Oxeltech Many error correction
algorithms are widely used in di erent scenarios,
each algorithm has some advantages and
disadvantages over one another. The most
commonly used ECC algorithms in Flash
memorOiesxaree Hlatmemcinghcodes Bose,
Chaudhuri, and Hocquenghem BCH codes
Reed-Solomon (R S) Codes and Low-Density
wwParity Codes LDPC 9 . Share
Figure 6 Bit ip due to soft errors 11 Wear
Leveling Wear leveling methods are used by all
managed NAND devices to work around program/erase
constraints by organizing data and uniformly
spreading writes throughout the whole block (so
no single block fails due to intensive
writes). It avoids the overuse of blocks,
allowing all blocks to be used to their full
potential. As a result, wear leveling increases
the memory devices life and enhances its
reliability and durability 12 .
Figure 7 Graphical representation with and
without wear levelling 12
9
3/8/23, 118 PM Flash Memory for your Embedded
Application - Oxeltech Managed NAND
Examples Because the controller is built into
the package to handle wear leveling, bad block
management, and ECC, managed NAND is much more
durOablxe aendl ptreovicdehs increased
life expectancy. Check the datasheet of the
product for exact life cycle information.
Examples of managed NAND are as follows
Share
eMMC SD card CompactFlash Solid State
Drives Universal Flash Storage
Wear Estimation Of NAND Flash At any given time,
ash health can be calculated as the amount of its
capacity that has already been depleted. At rst,
just for simplicity, suppose that no blocks wear
out prematurely, that wear leveling is optimum
and constant, and that there is no write ampli
cation in other words, the ideal
scenario. Estimate the amount of data that is
wri en to the device per day/week/year. Know how
many years you expect the device to operate. TBW
5 GB per day) x 365 days per year) x 10
years) TBW 18.25 TB wri en Write
Amplification Factor The phenomenon of write
ampli cation occurs when the amount of wri en
physical data to the NAND ash exceeds the amount
of data wri en by the host computer. Two main
factors cause write ampli cation factor First,
every memory storage device that utilizes NAND
Flash memory is made of elements that must be
erased before they can be rewri en
again. Second, while NAND storage devices can be
wri en one at a time which is usually the size of
a page is 4K bytes 16 K bytes, they can only
be erased one block at a time. A block sometimes
referred to as a NAND block or erase block
may hold hundreds of pages. This necessitates
background processes that transport stored user
data inside.
10
3/8/23, 118 PM Flash Memory for your Embedded
Application - Oxeltech As a solution, old data in
NAND frees up neighboring pages of data that may
be erased to make room for new data wri en by
the host computer. Therefore, the total number
of real writes to a NAND ash Ois
gxeneerlatllyelacrgehr than the number of writes
that the host computer intends to do.
Mathematical representation is known as WAF 9
. Share Write Ampli cation Factor (Data Wri en
to the Flash Memory) / (Data Wri en by the
host) Typically, the WAF is in the range of 1.0
to 2.5. Write ampli cation can vary greatly
depending on the nature of the data stream (or
workload) from the host machine. Small-block
random writes, on average, produce a greater WAF
and more wear than large-block sequential
writes. Also, full Derives will experience a
higher WAF compared to partially full drives.
Optimizing workload to minimize WAF can Maximize
the lifetime.
Figure 8 WAF example 13 TBW W ith Ty pical
WA F Estimate the amount of data that is wri en
to the device per day/week/year. Know how many
years you expect the device to operate. Insert
the write ampli cation factor. Perform the
calculation. TBW 5 GB per day) x 365 days per
year) x 10 years) TBW 18.25 TB wri en TBW
after WAF, TBW 18.25 TBW x 1.5 WAF TBW
27.325 TB wri en
11
3/8/23, 118 PM Flash Memory for your Embedded
Application - Oxeltech If the device is 8GB, the
required Program/ Erase cycles would be,
Program Erase Cycles 27,325 GB / 8 GB
Oxel tech
Program Erase Cycles 3,422 If thSehdaerevice
is only speci ed to 3,000 Program/ Erase Cycles
your device will fail before 10 Years.
Therefore, using a high-capacity device will
resolve this. References . E. Gregersen,
ash memory (h ps/ www.britannica.com/technology/
ash-memory), Online. Accessed 15 12 2021 .
. J. Hopkins, Di erences Between NAND vs NOR
Flash Memory (h ps/ www.totalphase.com/blog/2021/
06/di erences-between-nand-vs-nor- ash-
memory/), 9 June 2021. Online. Accessed 15 12
2021 . . J. S. Meena, Overview of Emerging
Non-volatile Memory Technologies (h ps/
www.researchgate.net/ gure/Comparison-of-NOR
Flash-array-and-NAND- Flash-array-architectures_
g8_265727614 , Sep 2014. Online. Accessed 15
12 2021 . . A. Aravindan, NAND Flash vs NOR
Flash (h ps/ www.embedded.com/ ash-101-nand-
ash-vs-nor- ash/), 23 July 2018. Online.
Accessed 15 12 2021 . . J.-L. AUFRANC, Wear
Estimation for Devices with eMMC Flash Memory,
16 AUGUST 2019. Online. Accessed 15 12 2021
. . E. Sullivan, What are the NAND ash memory
types and where do they work best? (h ps/
www.techtarget.com/searchstorage/feature/What-are-
the-NAND- ash- memory-types-and-where-do-they-work
-best), 27 Feb 2020. Online. Accessed 15 12
2021 . . T. Denholm, The Universe of Managed
NAND (h ps/ www.datalight.com/blog/2009/07/08/the
-universe-of-managed-nand/), Online.
Accessed 15 12 2021 . . zegobit, embedded
Multi Media Card (h ps/ u xers.com/d/64-emmc-embe
dded- multi-media-card) 1 May 17 2017.
Online. Accessed 15 12 2021 . . A. Aravindan,
Error management in NAND Flash (h ps/
www.embedded.com/ ash-101- error-management-in-na
nd- ash/), 31 March 2019. Online. Accessed 15
12 2021 . . Transcend, Bad Block Management (h
ps/ www.transcend- info.com/Embedded/Essay-24
, Online. Accessed 15 12 2021 . . D. Maric,
Are we going soft on errors (h ps/
lorit-consultancy.com/en/2020/10/are-
we-going-soft-on-errors-part-1/)?, Online.
Accessed 15 12 2021 . . How Wear Leveling
Extends SSD Life Expectancy (h ps/
www.atpinc.com/blog/how- SSD-wear-leveling-works)
, 5 8 2020. Online. Accessed 15 12 2021 .
12
3/8/23, 118 PM Flash Memory for your Embedded
Application - Oxeltech . R. t. Micron, Write
Ampli cation (h ps/ hyunyoung2.github.io/2016/09/
13/WAF/), 13 September 2016. Online.
Accessed 15 12 2021 . If you are facing any di
iculties in the domain of Embedded Design or
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