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SISSA Trieste AMD and SUN

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A leading global supplier of innovative semiconductor solutions for the personal ... FUJI 695. Intel. 811. 797. 735. An industry defining moment. ... – PowerPoint PPT presentation

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Title: SISSA Trieste AMD and SUN


1
SISSA Trieste AMD and SUN
Trieste, 22 Novembre 2004
Roberto Dognini Business Development Enterprise
Manager
2
AMD Overview
A leading global supplier of innovative
semiconductor solutions for the personal and
enterprise computing, communications and consumer
electronic markets
Founded 1969 Headquarters Sunnyvale,
California Employees 15,000 worldwide Sales Mix
80 international 2003 Revenue 3.5
billion 2004 Q2 Revenue 1.262 billion
  • Flash Memory 673 million
  • Microprocessors 554 million
  • Other 34 million

3
AMDs Extensive Processor History
K5
2003
2001
1999
1997
1995
1993
Am486
1991
1982
1975
1979
286
Am386
8080A
8086
  • Second source microprocessors

4
AMD An Innovation Powerhouse
  • Rank Company U.S. Patents
  • IBM 3,333
  • CANON 1,895
  • 3 NEC 1,833
  • 3 MICRON 1,833
  • 5 HITACHI 1,616
  • MATSUSHITA 1,566
  • SONY 1,456
  • GE 1,417
  • MITSUBISHI 1,408
  • SAMSUNG 1,329
  • FUJITSU 1,263
  • TOSHIBA 1,171
  • AMD 1,154
  • INTEL 1,080
  • HP 1,065
  • PHILIPS 848
  • MOTOROLA 736
  • TI 724

AMD 1,090 1,055 825
Year 2001 2000 1999
Intel 811 797 735
Technology Patents in 2002
Source IFI Claims, 2003
5
More Than A Product Announcement
An industry defining moment. Joining 20 years of
enterprise expertise with industry standard
economics, targeting the delivery of high
performance systems at accessible prices.
6
Building the AMD64 Ecosystem AMD and SUN
  • Key independent software vendors are already
    embracing the Sun and AMD Opteron processor-based
    offering as the standard in network computing
    BEA Systems, Cadence Design Systems, Inc.,
    Computer Associates, Documentum, MatrixOne Inc.,
    Oracle, Synopsys, Inc., and SAP AG.

http//www.amd.com/us-en/assets/content_type/Downl
oadableAssets/AMD64_ecosystem_final.pdf
7
Key Architecture Innovations
  • AMDs Eighth Generation processor integrates key
    system elements

Hammer Architecture
L2 Cache
DDR Memory Controller
Integrated DDR memory controller
X86 32-64 Processor Core
L1 Instruct. Cache
Next generation core
L1 Data Cache
HyperTransport technology
HyperTransport technology
8
Building a Bridge from the 32- to the 64-bit
World
  • Adds 64-bit capabilities to the worlds highest
    performing 32-bit core for 2P and 4P servers
  • Provides investment protection for users who have
    invested in 32-bit application software
  • Current 32-bit applications will work on todays
    32-bit operating systems as well as tomorrows
    64-bit operating systems
  • Windows XP, Windows 2000
  • Windows (with AMD64 compatibility)
  • Windows Server 2003
  • Linux for x86, Linux for AMD64
  • Enables a gradual application transition to
    64-bits as required by end-user individual needs
  • Doesnt require special hardware or investment in
    a proprietary infrastructure

32-bit Operating System
64-bit Operating System
32-bit Applications
32-bit Applications
64-bit Applications
9
Intel Xeon Processor-based Server
AMD Opteron Processor-based Server
HyperTransport Technology Buses for Glueless I/O
or CPU Expansion
DDR 144-bit
Intel Xeon Processor
Intel Xeon Processor
Second Processor Competes for FSB Bus Bandwidth
AMD Opteron Processor
AMD Opteron Processor
DDR 144-bit
Memory Access Delayed By Passing Through MCH
I/O Memory Share FSB
HyperTransport Link Has Ample Bandwidth For I/O
Devices
Separate Memory and I/O Paths Eliminates Most Bus
Contention
Memory Ctlr Hub (MCH)1
PCI-X
DDR 144-bit
PCI-X Bridge
Memory Capacity Scales w/ Number of Processors
PCI-X
Fewer Chips Needed For Basic Server (Reduces Cost)
Bandwidth Bottlenecks Link Bandwidth lt I/O
Bridge Bandwidth
Key Memory Traffic I/O Traffic IPC Traffic
I/O Hub
IDE, USB, LPC, Etc.
PCI
More Chips Needed for Basic Server
I/O Hub3
IDE, USB, LPC, Etc.
PCI
Architecture
Memory Access Technology
Primary Bus Technology
AMD-8131 HyperTransport PCI-X Tunnel
AMD-8111 HyperTransport I/O Hub
1 Intel E7500 Chipset Memory Controller Hub (MCH)
2 Intel 82870P2 64-bit PCI/PCI-X Controller Hub
2 (P64H2) 3 Intel 82801CA I/O Controller Hub
3-S (ICH3-S)
AMD, the AMD Arrow logo, AMD Opteron and
combinations thereof, and AMD-8111 and AMD-8131
are trademarks of Advanced Micro Devices, Inc.
HyperTransport is a licensed trademark of the
HyperTransport Technology Consortium. Other
product and company names used herein may be
trademarks of their respective companies.
10
AMD Opteron Processor-based Server
Intel Xeon MP Processor-based Server
HyperTransport Technology Buses for Glueless I/O
or CPU Expansion
HyperTransport Technology Buses Enable Glueless
Expansion for up to 8-way Servers
Maximum of Four Processors per Memory Controller
Hub
FSB Bus Bandwidth Shared Across All Four
Processors
Memory Capacity Scales w/ Number of Processors
Maximum of Three PCI-X Bridges per Memory
Controller Hub
Intel Xeon Processor
Intel Xeon Processor
Intel Xeon Processor
Intel Xeon Processor
Limited Memory Bandwidth Shared by All Memory
AMD Opteron Processor
AMD Opteron Processor
DDR 144-bit
DDR 144-bit
I/O Memory Share FSB
AMD Opteron Processor
AMD Opteron Processor
DDR 144-bit
DDR 144-bit
PCI-X Bridge2
PCI-X
HyperTransport Link Has Ample Bandwidth For I/O
Devices
Separate Memory and I/O Paths Eliminates Most Bus
Contention
PCI-X Bridge
Bandwidth Bottlenecks Link Bandwidth lt I/O
Bridge Bandwidth
I/O Hub
IDE, USB, LPC, Etc.
9-Chip Chipset Needed for 4-way Server
Fewer Chips Needed for 4-way Server (Reduces Cost)
  • AMD Opteron Processor-based Server
  • AMD64 Architecture provides simultaneous
    high-performance 32-bit and 64-bit computing.
    Scales to 8P without glue logic.
  • Integrated Memory Controller provides
    low-latency memory access and bandwidth that
    scales as processors are added.
  • HyperTransport Technology at up to 6.4GB/s
    bandwidth per link, designed to provide a
    high-speed connection between processors and core
    logic with sufficient bandwidth for supporting
    new and existing interconnects.
  • Intel Xeon MP Processor-based Server
  • IA32 Architecture provides high-performance
    32-bit computing onlydoes not offer 64-bit
    benefits.
  • Northbridge-based Memory Controller All four
    processors compete for fixed memory and
    front-side bus bandwidths8P solutions require
    even more chips.
  • Proprietary Hub I/O Buses bridge and hub devices
    can be overwhelmed by the I/O demands of attached
    peripherals.

1 ServerWorks CMIC HE Memory Controller Hub
(MCH) 2 ServerWorks CIOB-X 64-bit PCI/PCI-X
Controller Hub 3 ServerWorks CSB5 I/O Controller
Hub 4 ServerWorks REMC Memory Address Buffer
AMD-8131 HyperTransport PCI-X Tunnel
AMD-8111 HyperTransport I/O Hub
AMD, the AMD Arrow logo, AMD Opteron and
combinations thereof, and AMD-8111 and AMD-8131
are trademarks of Advanced Micro Devices, Inc.
HyperTransport is a licensed trademark of the
HyperTransport Technology Consortium. Other
product and company names used herein may be
trademarks of their respective companies.
11
Scalable Memory Bandwidth and IO Opterons on die
IO controller
  • 4 Separate IO Channels per CPU Scalable SMP
    Bandwidth
  • HyptertransportTM Interconnect low SMP memory
    latency
  • Commodity/High Performance SMP Solution
  • presently dual core ready SRQ controller has
    port for 2nd core
  • fewer of chips required for MP chipsets
    lowering cost of SMP systems

12
Speed up Opteron Architecture
  • ACML AMDs superior equivalent of MKL
  • Compilers PGI performance enhancements
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