Specification and design of a complex system: The ASML waferstepper - PowerPoint PPT Presentation

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Specification and design of a complex system: The ASML waferstepper

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Intensity, abberations, distortion, stray light, uniformity. cooperation with Zeiss, Cymer ... cabinets. UI. console. measurement. 12/21/98 -14 ... – PowerPoint PPT presentation

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Title: Specification and design of a complex system: The ASML waferstepper


1
Specification and design of a complex systemThe
ASML waferstepper
  • Gerrit Muller
  • 7-1-1999
  • Delft
  • Seminar Productieautomatisering 2000

2
The Market
1997
2002
semiconductor sales by end-use rmarket
GDP
33.4 T
39.4 T
3
3
non PC computing
consumer electronics
communications
other applications
electronic sales
PCs
902.4G
1284.2G
32
16
17
18
17
17
26
other semiconductors
semiconductor sales
ICs
memory
151.7G
330.6G
15
13
Equipment sales
equipment
22.3G
42.8G
16
17
steppers
Steppers
3.6G
7.3G
ASML sales 1997 1.8 Gfl net income 0.3 Gfl
source Dataquest, ING Barings research
www.asml.com
3
What is a waferstepper?
Lightsource
Mask (Reticle)
Lens
Die
Wafer
4
Step Scan technology
reticle
Scanning fieldsize
Slit
Stepping fieldsize
Lens
Lens
wafer
250 mm/s
5
Main specifications
Productivity
Imaging
Overlay
linewidth 180 nm (1999)
AA (single machine) 40 nm BC (matched) 60 nm
96 Wafers per hour
critical dimension control
For comparison Wafer diameter 200 mm Die size
ca. 2020 mm2
6
Products
300 mm, high throughput
i-line
248nm
248nm
i-line
193nm
7
Product roadmap
Athena/TIS
Quadrupole
2 kHz laser
T1100 193 nm scanner
Atlas 300 mm body
S400 I-line scanner
T400 I-line scanner
S700 DUV scanner
T700 DUV scanner
/900 193 nm scanner
5500 scanner body
/400 i-line scanner
/500 DUV scanner
/700 DUV scanner
/300C DUV stepper
/300D
5500 stepper body
/250C i-line stepper
8
Mechanical Design
  • dynamic performance
  • stage technology
  • servo technology
  • cooperation with Philips CFT, NatLab
  • design rule 10 nm-gt 1 nm -gt subnanometer

9
Example dynamic performance
many cables
  • 6 degrees of freedom
  • x, y, Rz
  • z, Rx, Ry
  • v 250 mm/s
  • a 10 m/s2
  • control frequency 4 kHz (250 ?sec)
  • position measerument by interferometers

10
Optics design
  • Projection design
  • Illumination
  • Light source (lasers)
  • Intensity, abberations, distortion, stray light,
    uniformity
  • cooperation with Zeiss, Cymer
  • 365 nm -gt 248 nm -gt 193 nm (-gt 157 nm?)
  • extensive modelling and simulation

11
Example projection design
  • ca 12 lens elements
  • temperature and pressure controlled
  • anti reflection coatings
  • 193 nm CaF

1 m.
12
Control architecture
  • Functions implemented in software
  • Calibration, Preparation, Expose, Batch control
  • Electronics infrastructure
  • Integration

13
Modular subsystems
illuminator
light source
reticle handling
reticle stage
measurement
lens
contamination and temperature control
electronics cabinets
UI console
wafer handling
wafer stage
base frame
14
System engineering
imaging
overlay
productivity
mechanics
optics
control
measurement
contamination temperature
15
Overlay budget
Off axis pos meas accuracy 4 nm
Off axis Sensor repro 3 nm
Global alignment accuracy 6 nm
Stage Al. pos. meas. accuracy 4 nm
Blue align sensor repro 3 nm
Lens Matching 25 nm
Reticle 15 nm
System adjustment accuracy 2 nm
tracking error WS 2 nm
tracking error X, Y 2.5 nm
Process Overlay 80 nm
Matched Machine 60 nm
Single Machine 30 nm
Stage overlay 12 nm
Position accuracy 7 nm
tracking error RS 1 nm
tracking error phi 75 nrad
Stage grid accuracy 5 nm
alignment repro 5 nm
Matching Accuracy 5 nm
Frame stability 2.5 nm
Process dependency sensor 5 nm
Metrology stability 6 nm
Interferometer stability 1 nm
16
Development phases
1
2
3
?
4
0
feasibility
definition
system design
integration
field monitoring
subsystem spec
subsystem design
engineering
verification
business impact
prs
sps
sds
tps
alfa test TAR
beta test TAR
plan cost, effort,time
integration plan
eps
eds
tps
prototype
tpd
17
SPS contents checklist
1
2
3
0
feasibility
definition
system design
subsystem spec
engineering
subsystem design
overview doc tree, structure
product lifecycle option structure draft
option structure
  • performance requirements
  • imaging
  • overlay
  • throughput
  • functional requirements
  • functional model (extern)
  • factory integration
  • user interface
  • functional requirements draft
  • functional model (extern) draft
  • operations requirements
  • serviceability
  • manufacturability
  • operations requirements draft
  • serviceability
  • manufacturability
  • environment requirements
  • wafer, reticles
  • power, gases, water, etc.
  • weight size
  • transport
  • machine requirements
  • design constraints, f.i. robustness
  • safety
  • reliability
  • COG, COO
  • interoperability

18
SDS contents checklist
1
2
3
0
feasibility
definition
system design
subsystem spec
engineering
subsystem design
doc tree, structure overview draft
doc tree, structure draft
overview
decomposition in subsystems
decomposition in subsystems draft
performance budgets
performance budgets draft
functional model (design)
functional model (design) draft
functional model (design) concept
function allocation
function allocation draft
function allocation concept
control architecture
control architecture draft
SW architecture
SW architecture draft Electrical architecture
handling interfaces
power, gas, water, etc budgets
power, gas, water, etc budgets draft
mechanical layout budgets
mechanical layout budgets draft
costprice budget
costprice budget draft
consumable budget
consumable budget draft
interoperability design
safety design
safety analysis
diagnostic analysis
accessability set up sequence tolerance
budget cycle time budget
diagnostic design
transport design
19
Definitions
PRS Product Requirement Specification What should
the product be Marketing SPS System Performance
Specification What will the product
be SE SDS System Design Specification How will
it be made SE TPS Test Performance
Specification What and how will it be
tested SE TAR Test Acceptance Report Testresult
SE EPS Element Performance Specification What
DE EDS Element Design Specification How DE TP
S Test Performance Specification What and how
will it be tested DE TAR Test Acceptance
Report Testresult DE EPS, EDS, TPS are
recursively applied from subsystem level to
monodisciplinary module level
20
Concurrent engineering, Integration
dynamical performance
subsystem1 design
subsystem2 design
imaging

overlay
metrology
Subsystem n design
levelling
Integration prototypes
Final integration
Concurrent engineering
21
Moores law (or challenge?)
SIA
97
98
99
00
01
02
03
04
05
06
1994 roadmap
250
180
130
1997 roadmap
250
180
150
130
1998 revision
250
180
150
125
1999 proposal
250
180
130
90
leading edge customers
250
180
130
100
linewidth in nm.
22
SIA
97
98
99
00
01
02
03
04
05
06
1994 roadmap
250
180
130
overlay
80
60
45
overlay
leading edge customers
250
180
130
100
35
overlay
80
60
45
Rule of thumb Process overlay linewidth / 3
23
Overlay budget
Off axis pos meas accuracy 4 nm
Off axis Sensor repro 3 nm
Dramatic increase of complexity!
2003 35 nm
Global alignment accuracy 6 nm
Stage Al. pos. meas. accuracy 4 nm
Blue align sensor repro 3 nm
Lens Matching 25 nm
Reticle 15 nm
System adjustment accuracy 2 nm
tracking error WS 2 nm
tracking error X, Y 2.5 nm
Process Overlay 80 nm
Matched Machine 60 nm
Single Machine 30 nm
Stage overlay 12 nm
Position accuracy 7 nm
tracking error RS 1 nm
tracking error phi 75 nrad
Stage grid accuracy 5 nm
alignment repro 5 nm
Matching Accuracy 5 nm
Frame stability 2.5 nm
Process dependency sensor 5 nm
Metrology stability 6 nm
Interferometer stability 1 nm
24
Summary ASML developement strategy
  • Concurrent engineering
  • short development cycle time
  • Networking
  • market
  • technology base
  • flexibility
  • System engineering
  • modularity
  • short integration
  • Family concept
  • upgradeability
  • follow SIA roadmap
  • reuse, risk reduction over generations

25
Stellingen
  • Multi disciplanary design process and skills
    required
  • Most unforeseens show up during integration
  • force integration start as early as possible
  • integration is always underestimated
  • Manage the design and integration by a few key
    parameters,
  • however watch out for sub - optimization
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