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Formal verification

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Formal specification language: properties. Reasoning method. Main strategies: Theorem proving ... Verification of temporal safety properties ... – PowerPoint PPT presentation

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Title: Formal verification


1
Formal verification
Marco A. Peña Universitat Politècnica de Catalunya
2
Outline
  • Motivation
  • Simulation
  • Formal verification
  • Theorem proving
  • Model checking
  • State space exploration
  • Formal verification with relative timing
  • Conclusions

3
Motivation
4
Motivation the problem
  • Systems complexity continuous growth is scale
    and functionality
  • Probability to introduce design errors increases
  • System failures are unacceptable
  • Software cost of update, credibility, etc.
  • Embedded software no update possible
  • Hardware high cost of fabrication/replacement
  • Safety-critical systems catastrophic
    consequences
  • Delay in time-to-market, loss of money and human
    lives!!

5
Motivation examples
  • 1994 Floating point divider unit of Pentium
    microprocessor
  • Bug in the implementation of the division
    algorithm
  • 475 million US
  • 1996 Launch failure of Ariane 5 rocket
  • Wrong data type conversion when computing
    altitude
  • Explosion 36 minutes after lunch
  • 1986 Challenger space shuttle
  • …
  • What else?

6
Motivation where do bugs come from?
  • Incorrect specifications
  • Misinterpretation of specifications
  • Misunderstandings between designers
  • Missed cases
  • Protocol non-conformance
  • And a long etcetera.

7
Motivation what to do?
  • Develop methods to ensure systems reliability
  • Detect and fix bugs at the early stages of the
    design flow
  • Verification
  • General bug-finding techniques.
  • Usually simulation.
  • Formal verification
  • Methods for 100 bug coverage.
  • Use mathematical formalisms (logics, automata,
    etc.) and techniques to reason about the
    correctness of a system.

8
Simulation
9
Simulation
  • Predominant verification method intuitive idea
  • Construction of test-cases manually, randomly,
    etc.
  • Heisenbug paradigm when trying to reproduce a
    bug it never shows up
  • Example (x1)2 x2 2x 1 ?

10
Simulation
  • Example
  • Concurrent processes A and B
  • Events happen concurrently every 1010 operation
    cycles

Precondition X 0 Postcondition X 1 (!)
  • Process A
  • .......
  • X X 1
  • .......
  • Process B
  • .......
  • X X - 1
  • .......

11
Simulation typical experience
Functional testing
Purgatory
Product in the market
Bugs found
Time
12
Formal verification
13
Formal verification
  • Ensures consistency with specification for all
    possible input patterns exhaustive coverage
  • Requires
  • Formal model of the system
  • Formal specification language properties
  • Reasoning method
  • Main strategies
  • Theorem proving
  • Model checking

14
Formal verification
  • Example (x1)2 x2 2x 1 ?

15
Formal verification theorem proving
  • Implementation and specification formulas in
    some mathematical logic
  • Deep knowledge of the formalisms and proof
    techniques
  • The prover is often human
  • Useful for arithmetic algorithms, etc.

16
Formal verification theorem proving
  • Major drawbacks no guarantee of a proof,
    complexity of the proof, no counterexample, …
  • Some impressive results
  • AMD K7 floating point unit
  • Combined with model checking Intel P4
    instruction decoder
  • Few automatic tools exist
  • Not a general solution
  • Too expert human interaction
  • Only for small problems or niche applications

17
Formal verification model checking
  • The checker enumerates all the states of the
    system
  • Finite state space, but combinatorial explosion !
  • Symbolic methods, partial orders, abstractions,
    etc.
  • Several automatic tools and success stories exist

18
Formal verification model checking
  • Gaining acceptance but not yet widely used
  • Major drawbacks state explosion problem and
    tools difficult to use for designers
  • Commercial tools start to appear Abstract,
    Chrysalis, IBM, Lucent, Verysys, …
  • Companies have increasing interest IBM, Intel,
    ATT, etc. ? Oportunity!
  • Not a general solution
  • Combination with theorem proving
  • Combination with semi-formal strategies

19
State space exploration
20
State space exploration
  • Combinatorial explosion
  • Symbolic representations BDDs

21
State space exploration
Some states do not exist, but …
22
State space exploration
Time incorporates a new source of exponentiality
!!
23
Formal verification with Relative Timing
24
Verification approach main features
  • Model checking-like approach for timed systems
  • Iterative incremental refinement of the untimed
    state space by
  • Off-line timing analysis on small acyclic graphs,
    and
  • Incorporation of Relative Timing constraints
  • Verification of temporal safety properties
  • BDD-based symbolic representation large untimed
    state spaces
  • Backannotation sufficient relative timing
    constraints for correctness are reported, or
    counterexample trace

25
Verification approach system model
  • Timed Transition Systems Transition System
    delay bounds

26
Verification approach
27
Verification approach
28
Verification approach
29
Verification approach
30
Verification approach
31
Verification approach
32
Verification approach
33
Verification approach
Symbolic state space exploration and failure
detection
34
Verification approach
  • Failure trace
  • Composition

35
Verification approach
  • Failure trace
  • Composition

36
Verification approach flow
37
Conclusions
38
Conclusions
100
Probability of verification
Research
Real systems
1
10
100
103
104
105
106
107
Size of the system (state bits)
39
Conclusions research
  • Research in Spain University
  • PhD programs, FI/FPI grants
  • Possible stages in foreign universities/companies
  • Verification teams in companies grow much faster
    than design teams oportunity!
  • Companies and research centers
  • USA and Europe
  • PhD required

40
Conclusions collaboration, projects,…
  • Long list of open problems
  • Real case studies circuits, protocols, etc.
  • Implementations of other techniques for
    comparison
  • Parallel implementations clusters, etc.
  • Combination of techniques formal and
    semi-formal, etc.
  • …
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