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SOI CMOS EECS 277A

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SOI CMOS EECS 277A Aishwarya Sankara 17723777 * UNIVERSITY OF CALIFORNIA, IRVINE ... Superior capabilities of SOI CMOS technology usage in memory cell implementation. – PowerPoint PPT presentation

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Title: SOI CMOS EECS 277A


1
SOI CMOSEECS 277A
  • Aishwarya Sankara
  • 17723777

2
Today
  • What is SOI?
  • Characteristics of SOI
  • Fabrication methods
  • Basic categorization
  • Electrical anomalies
  • Advantages and Disadvantages

3
What is SOI?
  • SOI Silicon-on-Insulator
  • Si layer on top of an insulator layer to build
    active devices and circuits.
  • The insulator layer is usually made of SiO2

4
Characteristics
  • Include
  • High speed
  • Low power
  • High device density
  • Easier device isolation structure

5
SOI Fabrication Processes
  • SOS Silicon-on-Sapphire
  • SIMOX Separation by Implantation of Oxygen
  • ZMR Zone melting and recrystallization
  • BESOI Bond and Etch-back SOI
  • Smart-cut SOI Technology

6
Categorization
  • Categorization based on the thickness of the
    silicon film.
  • The first is a partially-depleted device and the
    latter is a fully-depleted device.
  • Each has its own advantages and disadvantages.
  • PD device threshold voltage is insensitive to
    film thickness.
  • FD device has reduced short channel and narrow
    channel effects.

7
Electrical anomalies
  • Floating-body effect
  • Usually seen in Partially-Depleted devices.
  • As shown in figure, the MOS structure is
    accompanied by a parasitic bipolar device in
    parallel.
  • The base of this device is floating.

8
Electrical anomalies
  • Kink Effect
  • Sudden discontinuity in drain current.
  • Seen when the device is biased in the saturation
    region.
  • The bipolar device is turned on.
  • Solution
  • -Provide a body contact for the device.
  • - Use FD devices.

9
Electrical anomalies
  • Self-heating effect
  • Thermal insulation is provided by the oxide
    surface.
  • Heat dissipation is not efficient.
  • This happens only when there is logic switching
    in the device.
  • In fully-depleted devices, the threshold voltage
    is sensitive to the thickness of the silicon
    film.
  • Manufacturing process is comparatively difficult.

10
Advantages of SOI
  • Suitable for high-energy radiation environments.
  • Parasitic capacitances of SOI devices are much
    smaller.
  • No latch-up.

11
Advantages
  • -Easier device isolation
  • -High device density
  • -Easier scale-down of threshold voltage.

12
Uses in digital and analog circuits
  • A combination of FD and PD devices are used in
    digital circuitry.
  • Superior capabilities of SOI CMOS technology
    usage in memory cell implementation.

13
Uses in digital and analog circuits
  • SOI technology is useful for implementing
    high-speed op-amps given its low Vt.
  • Higher transconductance (especially of FD)
    implies higher gain.
  • Lower power consumption compared to bulk devices
    at low current level.

14
Disadvantages
  • Major bottleneck is high manufacturing costs of
    the wafer.
  • Floating-body effects impede extensive usage of
    SOI.
  • Device integration dopant reaction with the
    oxide surface.
  • Electrical differences between and SOI nad bulk
    devices.

15
Conclusion
  • Due to its characteristics, SOI is fast becoming
    a standard in IC fabrication.
  • Several companies have taken up SOI
    manufacturing.
  • High-volume production of SOI is yet to become
    common.

16
References
  • J. Kuo, Low- Voltage SOI CMOS VLSI Devices and
    Circuits. New York, John Wiley, Sept 2001.
  • J.Kuo, CMOS VLSI Engineering(SOI). Kluwer
    Academic Publishers, 1998.
  • Vivian Ma, SOI VS CMOS. University of Toronto.
  • www.google.com
  • www.chips.ibm.com
  • THANK YOU!
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