ECE 448 FPGA and ASIC Design with VHDL

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Lab 1 Introduction to Aldec Active HDL
Implementing Combinational Logic in VHDL
ECE 448 FPGA and ASIC Design with VHDL
George Mason University
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Part 1
Introduction to Aldec Active-HDL
Example Seven Segment Encoder
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Experiment 1 Problem 1 ALU of Motorola 68HC11
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Register structure of MC6811
Accumulators A and B or
A
B
7
7
0
0
D
Double Accumulator D
0
15
X-index register
IX
0
15
Y-index register
IY
0
15
Stack Pointer
SP
0
15
Program Counter
PC
0
15
Condition Code Register
CCR
0
7
S X H I N Z V C
7
Condition Code Register
CCR
7
0
S X H I N Z V C
carry / borrow overflow zero negative I-interrupt
mask half-carry (from bit 3) X-interrupt
mask stop disable
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Definition of the Condition Code Register flags
(1)
Zero flag - Z
zero result
Z 1 if result 0 0
otherwise
Negative flag- N
negative result
N sign bit of the result R7 - for
an 8-bit result
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Definition of the Condition Code Register flags
(2)
Carry flag - C
out-of-range for unsigned numbers
C 1 if result gt MAX_UNSIGNED or
result lt 0 0
otherwise
where MAX_UNSIGNED 28-1
for 8-bit results
Overflow flag - V
out-of-range for signed numbers
V 1 if result gt MAX_SIGNED or
result lt MIN_SIGNED
0 otherwise
where MAX_SIGNED 27-1 and MIN_SIGNED
-27
for 8-bit results
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Overflow for signed numbers (1)
Indication of overflow
Negative Negative Positive
Positive Positive Negative
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Addressing modes of the ADDA instruction
Immediate mode
A 5C ? A
ADDA 5C
Direct mode
A (001B) ? A
ADDA 1B
Extended mode
A (6D00) ? A
ADDA 6D00
M
Indexed mode
A(IX56) ? A
ADDA 56, X ADDA 56, Y
A(IY56) ? A
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Assembly language vs. machine code
Assembly language
mnemonic operands
NEGB
ADDA 4A
ADDA 5B78
Machine code
opcode operands
50
8B 4A
BB 5B 78
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Arithmetic instructions (1)
N Z V C
1. addition Acc M ? Acc ADD A, B ADC A,
B 2. subtraction Acc M ? Acc SUB A, B SBC
A, B
IMM, DIR, EXT, IND
IMM, DIR, EXT, IND
3. negation -X NEG A, B NEG
INH
EXT, IND
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Arithmetic instructions (2)
N Z V C
1. addition A B ? A ABA 2. subtraction A
B ? A SBA
INH
INH

• unsigned multiplication
• A x B ? D
• MUL

INH
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Part 2 Mini ALU
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opcode
4
4
A
4
Mini ALU
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R
B
4
M
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Block diagram
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Arithmetic Functions in VHDL (1)

• To use arithmetic operations involving
• std_logic_vectors you need to include the
• following library packages
• library ieee
• use ieee.std_logic_1164.all
• use ieee.STD_LOGIC_UNSIGNED.ALL

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Arithmetic Functions in VHDL (2)

• You can use standard , - operators
• to perform addition and subtraction
• signal A STD_LOGIC_VECTOR(3 downto 0)
• signal B STD_LOGIC_VECTOR(3 downto 0)
• signal C STD_LOGIC_VECTOR(3 downto 0)
• Clt A B

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Experiment 1 Problem 2 Variable Rotator
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Part 3 Variable rotator
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Function
C A ltltlt B
A 16-bit data input B - 4-bit rotation amount
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Interface
A
16
4
B
16
C
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Block diagram
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Fixed Rotations in VHDL
Altltlt1
A(3)
A(2)
A(2)
A(1)
A(0)
A(3)
A_rotL lt A(2 downto 0) A(3)