CS 2200 Lecture 3 Instruction Set Architectures ISAs

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CS 2200 Lecture 3Instruction Set Architectures
(ISAs)

• (Lectures based on the work of Jay Brockman,
  Sharon Hu, Randy Katz, Peter Kogge, Bill Leahy,
  Ken MacKenzie, Richard Murphy, and Michael
  Niemier)

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History
Hardware Expensive Memory Expensive Accumulators
EDSAC IBM 701
Hardware Less Expensive Memory Expensive Register
Oriented Machines (2 address) Register-Memory
IBM 360 DEC PDP-11 Also Some Stack
Machines Burroughs B-5000 (Banks)
Hardware Memory Cheap Microprocessors Compilers
get good CISC VAX Motorola 68000
Intel 80x86 RISC Berkley RISC ?Sparc
Dave Patterson Stanford MIPS ?SGI John
Hennessy IBM 801
1940 1950
1960 1970
1980 1990
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Next

• Well focus on register, register machines
• (why learn a lot about something from the 1960s?)
• In particular, well present a MIPS, DLX view
• Later, well look at the LC 2200
• The LC 2200 is a simple machine that youll use
  for lots of projects and HWs.
• Ill often present concepts in terms of the
  LC2200 hopefully this should help with
  HWs/projects

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Where is all of the data that we need to use in
instructions?
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Typical Operation

• add a,b,c a b c
• What if we want to do a bcde?
• (Try it!)
• add a,b,c
• add a,a,d
• add a,a,e

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Whats the answer?

• (56) - (34)
• How did you do it?
• e (ab) - (cd)
• add t1,a,b
• add t2,c,d
• sub e,t1,t2

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Operands

• add a,b,c
• Where are a, b and c?
• Memory?
• I/O Device?
• Registers (in processor)?
• ???
• How does the data get in and out of the
  registers?
• load
• store

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What about memory addresses?

• Usually instruction sets are byte addressed
• Provide access for bytes (8 bits), half-words (16
  bits), words (32 bits), double words (64 bits)
• Two different ordering types big/little endian

31
23
15
7
0
Little Endian
Puts byte w/addr. xx00 at least significant
position in the word
31
23
15
7
0
Big Endian
Puts byte w/addr. xx00 at most significant
position in the word
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Another view of Endianess

• No, were not making this up.
• at word address 100 (assume a 4-byte word)
• long a 0x11223344
• big-endian (MSB at word address) layout
• 100 101 102 103
• 100 11 22 33 44
• 0 1 2 3
• little-endian (LSB at word address) layout
• 103 102 101 100
• 11 22 33 44 100
• 3 2 1 0

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Another example

• Consider string layout starting at word addr
  100
• char a12 RAMACHANDRAN
• char b12 WAMACHANDRAN

Big Endian
Little Endian
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Memory addressing modes

• Refers to how architectures specify the address
  of an object they will access
• Fancy language for
• How do we tell the processor address to access in
  memory?
• In GPR machines, addressing mode can specify a
  constant, register or location in memory
• When memory location is used, actual memory
  address specified in the addressing mode is
  called the effective address
• Next, we summarize different types of addressing
  modes (excluding PC relative)

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Addressing Modes
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Addressing modes continued
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Addressing modes Final thoughts

• A new architecture would most likely have at
  least displacement, immediate, and register
  deferred in addition to register obviously
• For example
• An Example MIPS machine

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An example MIPS machine
FYI, designing something like this (that
executes instructions) will be a big focus of the
1st part of this class.
You dont have to understand this now, but lets
walk through whats here
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Types of instructions and how theyre used
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Instruction Classes

• Weve talked lots about instructions, instruction
  counts, but what are they really?
• Lets look at some basic instruction classes
• Arithmetic/Logical AND, OR, add, sub
• Data Transfer Loads/Stores, move inst.
  (machines
• w/addressable memory)
• Control Branch, jump, procedure call return,
  traps
• System OP Sys. calls, virtual memory management
• Floating Point Floating point ops multiply and
  divide
• Decimal Dec. add, multiply dec.-to-char.
  conversions
• String String move, compare, search
• Graphics Pixel ops, compression/decompression

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What instructions are really used?

• Usually the most commonly executed instructions
  are the simple ones
• For example consider this Intel 80x86 mix

These 10 instructions make up 96 of all those
executed!