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Digital Tachometer

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Digital Tachometer. Participant: Naveen K Boggarpu Place : EPE-PEMC 2006, Portoroz, Slovenia. ... CSDT stands for Constant Sample Time Digital Tachometer ... – PowerPoint PPT presentation

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Title: Digital Tachometer


1
Digital Tachometer
  • Participant Naveen K Boggarpu Place
    EPE-PEMC 2006,

    Portoroz, Slovenia.
  • Supervisor Richard C. Kavanagh Date
    31/08/06

2
Agenda
  • Introduction
  • Design Techniques
  • Implementation
  • Conclusion

3
1.Introduction
  • 1.1 Aim of the project
  • To improve the performance of high-bandwidth
    servo systems using the Constant Sample-time
    Digital Tachometer (CSDT) method and particularly
    to design a new improved technique to compensate
    for high frequency sensor (encoder) errors.
  • 1.2 Objectives
  • On-line learning of sensor characteristics
    to enable use of low-cost encoders
  • a. New techniques to obtain
    improved tachometer output
  • b. Matlab model for selected
    technique
  • c. Experimental implementation

4
  • 1.3 Background of the project
  • Why not sensorless?
  • a) Accurate trajectory following
    for very high bandwidth robotics
  • b) NC machines
  • c) Low speed machines
  • Compensate errors due to misalignment of edges
  • High-resolution encoders

Fig.1.1 Basic block diagram of a digital
tachometer
5
2.Design Techniques
2.1 Speed measuring Techniques a)
Pulse counting technique b)
Elapsed time technique
  • 2.2 Pulse counting method
  • Time interval is fixed
  • Effect of quantization at low shaft speed is main
    drawback
  • Poor transient response and very poor resolution
    except at very high speeds
  • Velocity resolution can be improved by
    quadrature decoding

Fig.2.1 Pulse counting technique
Where is fixed sample time, N is the pulse
count .
6
  • 2.3 Elapsed time method
  • In this method the output from hardware is
    inversely proportional to speed
  • Suitable for low shaft speeds
  • Better transient response than pulse count
    method
  • This method has poor resolution at high speeds
    and poor dynamic response at low speeds.

Fig2.2 Elapsed time technique
Where is the input frequency to the
counter, pulse counts of high freq between
two successive pulses
7
  • 2.5 CSDT Method
  • CSDT stands for Constant Sample Time Digital
    Tachometer
  • This method is an optimised version of pulse
    counting method with better accuracy and
    transient response CSDT method
  • Greater speed range

Fig2.4 Original CSDT model
Where is N is pulse count for on sample period Ts
. In simplified CSDT method T1 is eliminated.
8
  • 2.5.1 Simplified CSDT
  • T1(i) is eliminated in velocity calculation
  • 2.5.2 CSDT at low speed
  • At low speeds the lag increases and an additional
    observer is required for some closed loop
    applications
  • Modified equation to calculate very low speeds
    is given below

Fig2.5 Simplified CSDT method
Fig2.6 Low speed CSDT method
9
3.Implementation
Fig.3.1 Experimental setup
  • Drive DS1104 is used to control the speed of the
    motor
  • Encoder used is a three channel incremental
    encoder
  • FPGA is used to calculate the auxiliary time and
    digital position from encoder input
  • D-space is used to perform the high speed
    calculations

10
  • 4.1 FPGA
  • FPGA is designed using Xilinx Project Manager
  • Project is implemented using schematics design
    approach
  • Auxiliary time and digital position are
    transferred through 8-bit databus
  • 4.2 DSP
  • DS1104 DSP chip is used
  • Calculation of velocity and control is
    implemented using Controldesk software

Fig.3.2 FPGA design
11
  • 4.3 Simulation
  • MATLAB is used as simulation tool
  • Code is written to simulate the encoder output
    and calculate the velocity using CSDT method
  • Compensation is implemented in simulation by
    creating a lookup table using digital position
    and auxiliary timing data

Fig 3.3 CSDT velocity before compensation
Fig 3.4 CSDT velocity after compensation
12
Fig 3.6.1 Digital position of encoder (Top), Fig
3.6.2 Auxiliary time, Bottom (Middle), Fig 3.6.3
Velocity at every edge (Bottom)
Fig 3.5 Experimental setup
  • 4.4 Online learning
  • FPGA is calculating digital position and
    auxiliary time using the encoder output
  • Digital position and the auxiliary time are
    shown in Fig 3.6.1 and Fig 3.6.2 respectively
  • In Fig 3.6.3 the velocities at different edges
    are shown

13
5.Conclusion
  • CSDT method is selected as it has good transient
    response and better accuracy
  • FPGA is used to calculation of auxiliary time and
    digital position
  • Simulation model is implemented
  • Working on offline programming
  • Future works
  • Online implementation
  • Working on bidirectional motion
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