Design of a Low Voltage-Low Dropout Regulator

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Design of a Low Voltage-Low Dropout Regulator
University of Puerto Rico - Mayagüez
CampusElectrical and Computer Engineering
Department

• Design by
• Carlos Ortiz - ortiz_cj_at_ieee.org
• Pedro Alicea - milalic_at_yahoo.com
• Advisors
• Raúl Pérez (Texas Instruments)
• Dr. Rogelio Palomera (UPRM)
• Dr. Manuel Jiménez (UPRM)

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Outline

• Introduction
• Applications
• Objective
• Block Diagram
• General Characteristics
• Key Parameters
• Conclusions

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Introduction

• LDO stands for Low Drop-Out Regulator
• Minimize the difference between the input and
  output voltage when it ceases to regulate
• Provide a relatively simple and inexpensive power
  management solution

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Application Example of a Mobile Phone

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Other Applications

• PCMCIA Card
• Cellular Phones
• Camcorders, Cameras
• DSL/Cable Modems
• MP3/CD Players

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Objective

• Design a Low power/low voltage LDO with two
  different outputs (1V or 1.8V)

LDO Concept
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LDO Block Diagram
Vout ((R2R1)/R2) Vref
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Low Drop-Out Voltage Regulator

• Composed of the following
• Voltage Reference
• Pass Element
• Error Amplifier
• Feedback Resistors

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Key Parameters

• Dropout Voltage
• Load Regulation
• Line Regulation
• Power Supply Rejection Ratio
• Output voltage is controlled by the resistive
  negative feedback
• Input voltage must be greater than the output
  voltage

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Voltage Reference

• Provides a constant output voltage which will be
  compared with the output voltage from the
  feedback network

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Pass Element
High Voltage

• Provides the output current needed to drive any
  load
• The output current is controlled by the error
  amplifier output

Low Voltage
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Error Amplifier and Resistive Network

• Error Amplifier
• Produces an error signal whenever the fed back
  sensed output differs from the reference voltage
• Feedback Network
• Produces the output voltage (voltage divider)

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LDO Schematic
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Specific Characteristics of our LDO

• Load Regulation
• Vo1V - 11.5mV Vo1.84V - 19mV
• Line Regulation(Input 2V to 3V)
• Vo1V - 2.5mV Vo1.84V - 6mV
• Quiescent current 23uA

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Unit Step Response Vout 1V
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Unit Step Response Vout 1.8V
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Typical Transient Response Vout 1V
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Typical Transient Response Vout 1.8V
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Conclusions

• Successfully designed a functional Low Voltage
  Low Drop-out Regulator with 1V or 1.8V output
• It has Low Power, good Load and Line Regulation
  characteristics
• Low quiescent current

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Future Work

• Optimize the settling time of the LDO (faster
  response)
• Design an active feedback network

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Acknowledgements

• Raul Pérez, Prof. Rogelio Palomera and Dr. Manuel
  Jiménez for all their support
• Texas Instruments Inc. for the opportunity that
  they gave us
• David Meléndez who worked with us at the
  beginning of the design

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References

• http//users.ece.gatech.edu/rincon-mora/
• http//www.ti.com/
• http//www.microsemi.com/
• Recommended sites
• http//ece.uprm.edu/
• http//ece.uprm.edu/icdl/