Information-Flow Models for Shared Memory

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Information-Flow Models for Shared Memory

• Allon Adir
• Hagit Attiya
• Gil Shurek

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Program Example
Initial state All0
Prog1
Prog2
load(X, R1)
load(Y, R3)
R2 R1
R3 R3 1
R1 1
store(R1, Y)
store(R3, X)
Final state R22 ?
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Program Example
Initial state All0
Prog1
Prog2
load(X, R1)
load(Y, R3)
R2 R1
R3 R3 1
R1 1
store(R1, Y)
store(R3, X)
Final state YR11, XR2R32
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PowerPC Consistency
Initial state All0
Prog1
Prog2
load(X, R1)
load(Y, R3)
R2 R1
R3 R3 1
R1 1
store(R1, Y)
store(R3, X)
Final state YR11, XR2R32
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Shared-Memory Semantics

• Capturing intricate shared-memory behaviors
• Speculation
• Out-of-Order Execution
• Synchronization
• Granularity of Memory Accesses
• Without revealing micro-architecture details

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Outline

• What is an Architecture?
• What is a Computation Model?
• The Framework
• Sequential Consistency
• PowerPC Consistency

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What is an "Architecture"?
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Elements of an Architecture

• Resources
• Granules
• States
• Instructions
• Formats
• Operands
• Source/Target
• Addressing-Mode
• State Transformation

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Elements of an Architecture

• Program order

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Computation Model

• Can we reach final state s2 by running a program
  Prog from initial state s1?
• Written as
• Is ás1, s2, Progñ possible?

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Example Sequential Consistency
Initial state R1R2X0
Prog1 Prog2 store(R2, X) R11
R22 store(R1, X) store(R2, X)
Final state R11, R22, X0
X1 X2
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The Framework

• Instruction instances Text order
• Flow-of-Information

Text Order
branch
store
cmp
nand
store
mul
load
load
xor
Is the flow-of-information allowed by the model?
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The Elements

• Resource X,R
• Assignment resource-value pair (X,5)
• Operation in-out pair
  ((X,5),(R,5))
• Instruction ((X,0),(R,0)),
  ((X,1),(R,1)), ...
• Program sequence of commands C1,...,Cm
• Command an instruction B and a function
• next B 1..mÈ

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Program Order Example
Prog Instantiating Prog
C1 load(X,R1) C2 R3 R1R2 next(C1)2 next(C2
)
op1 ((X,1),(R1,1)) op2 ((R1,1),(R2,1),
(R3,2)) s1 (X,1), (R1,1), (R2,1),
(R3,1) s2 (X,1), (R1,1), (R2,1), (R3,2)
Program order s1 op1 op2 s2
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Reads-From Mapping f
R2
s1 All1 load(X,R1) R3 R1R2 s2 R32,
others1
R1
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Reads-From Mapping f
R2, X
R2
s1 All1 load(X,R1) R3 R1R2 s2 R32,
others1
R1
R1
R3
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The Reads-From Mapping is not Cyclic
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View orders lt

• Order the operations in Prog
• One for each Progi
• Obey architecture-specific rules relating
• program-order
• reads-from mapping

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Sequential Execution
Information can not be read from the hidden past
I(X)
f(x)
op5
O(X)
lt
lt
lt
lt
op2
s2
op1
s1
op4
op3
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Sequential Execution
Information can not be read from the future
f
op5
lt
lt
lt
lt
op2
s2
op1
s1
op4
op3
Relative to which order?
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Sequential Consistency

• áS1,S2,Progñ is sequentially consistent if
• Prog can be instantiated with a set of
  operations A and program order
• A single view order
• linear
• extends the program order
• Information flow satisfies the sequential
• execution conditions relative to view order

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PowerPC Consistency

• Information flow satisfies the sequential
  execution conditions
• Relative to program order
• Relative to view orders

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PowerPC Consistency View Orders

• View orders enforce that
• Memory is coherent, except for local stores.
• Shared resource dependencies are preserved.
• sync orders operations around it.
• sync is transitive (sort of).
• Branch dependencies are preserved.

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PowerPC Consistency View Orders I
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PowerPC Consistency View Orders II
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Speculation is Visible to Programs
Final state XY1 R11,R20 R31,R40