ASIC vs. FPGA

1
ASIC vs. FPGA A Comparisson

• Hardware-Software Codesign
• Voin Legourski

2
Motivation

• Differences between FPGAs and ASICs
• Cost
• Performance
• Power consumption
• Design decision FPGA vs. ASIC
• Early stages of the design
• FPGA makers
• Understanding points of weakness of FPGAs
• Comparisson between FPGA and ASIC can help
  optimizing FPGA structure

3
Accuracy of the comparisson

• Fair comparisson between ASIC and FPGA is
  difficult
• Methodology
• 90nm Altera Stratix II FPGA
• 90nm CMOS090 design platform for ASIC
• Benchmarks in Verilog or VHDL
• Comparisson metrics
• Area
• Area of the standard cell implementation for ASIC
• Only area of used resources for FPGA
• Performance
• Critical path delay simulated
• Power
• Dynamic power consumption simulated at 33MHz

4
Results Area

• Area gap
• (FPGA area)/(ASIC area)
• DSP blocks memory
• Reduce the area gap
• Application specific

5
Results Delay

• (FPGA delay)/(ASIC delay)
• Worst case critical path delay simulated

6
Results - Power

• Dynamic power consumption FPGA/ASIC

7
Conclusions

• Circuits implemented on FPGAs use 35 times larger
  area, consume about 14 times more energy and are
  4.6 times slower
• Heterogeneous blocks in FPGA reduce the area gap
  significantly, but the critical time path hardly
• Less design area due to heterogeneous bocks leads
  to less power consumption
• Bigger designs tend to reduce the power
  inefficiency of FPGA
• Better results with FPGA if its blocks are fully
  utilized
• FPGAs can achieve significantly less performance
  than equal technology ASICs
• Designers should take into account the FPGA
  disadvantages vs. ASIC cost and decide what fits
  for each application best

8

• Thank you!