www.erlang-factory.com

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Erlang in global radio astronomy
Controlling embedded hardware
Harro Verkouter/Joint Institute for VLBI in Europe
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Joint Institute for VLBI in Europe
Very Long Baseline Interferometry
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Ever larger telescopes
15cm
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Electromagnetic radiation
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? (m) D (m) ?/D (rad)
smallest optical 10-7 10-1 10-6
biggest radio 10-1 100 10-3
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A neat trick
100m
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A neat trick
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A different ball game!
? (m) D (m) ?/D (rad)
largest optical (IR) 10-6 10 10-6
VLBI (radio) 10-1 107 10-8
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Science
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Science
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Recording the data
Record up to 4096 Mbps (512 Mbyte/s)
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n2
Number of combinations to be computed as function
of n
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16 telescopes at 1024 Mbps
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UniBoard
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Erlang?!

• typical languages used
• 80 C
• 15 Python
• PHP, Fortran, perl
• database
• MySQL
• needed to convince management
• pilot projects!

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Decoding data files

• VLBI has framed data format(s)

• Look for syncword
• different flavours, same syncword, different
  framesize
• Other format uses different syncword

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(not quite) surprising little code

• 212 lines of code
• first dabblings ...
• about a weeks work
• recognizes decodes 3 formats
• decodes the BCD timestamps
• supports distributed system
• reading file on one machine
• decoding on other machine
• management duely impressed
• got permission to do a larger pilot!

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Soft real time monitoring website

• webcams at stations
• webpage with http links FAIL
• unreliable links
• really high latency (China, Chile)
• dont want broken images
• low bandwidth
• cache in Europe multiple users eat all bandwidth
• parse telescope logfiles
• immediate antenna calibration info
• generate timeseries plots as observation
  progresses
• stored in MySQL

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Soft real time monitoring website

• webcam URLs status stored in MySQL
• supervisor starts webcam monitors
• one gen_server for each webcam
• loads info from MySQL
• uses httprequest/1
• strict checking on return value
• only HTTP 200 status replies
• content_length header set?
• explode if problem
• use a port to ImageMagick to scale image
• write binary JPEG data into mnesia

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Soft real time monitoring website

• monitor all participating telescopes
• telescope log file (ASCII text)
• retrieved via python ssh
• read into Erlang using a port
• low data rate after start up
• parses lines
• update MySQL
• generate plots using gnuplot
• for each telescope
• query MySQL every so many minutes
• using a port
• write .png binary data to mnesia

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Soft real time monitoring website

• patch it all together using webtool
• cache complete webpage in mnesia
• too old? generate new one
• serve .png and .jpg data from mnesia
• image URL points back to webtool
• extremely simple to cache serve data
• brilliant idea mapping URL to erlang fn call!
• in total used 3000 lines of code
• webcam, logfile monitoring plotting serving web
  pages
• excellent test case for OTP and distributed
  system
• got the green light for the real thing!

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UniBoard
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Server
Nios2 CPU
UDP/IPv4 over ethernet
Client
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Simple binary protocol
Read N 32bit words starting from START ADDRESS
(Over)Write N 32bit words from the packet to
START ADDRESS
Read/Modify/Write N 32bit words from START
ADDRESS packet to START ADDRESS
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FPGA client library
one controller ? one fpga

• Registermap
• list of register definitions
• type of the register (details follow)
• name of the register (symbolic)
• address of the register in the memory map

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FPGA client library
Available registerdefinition types for the
controller
fpgabit( ltnamegt, ltbit gt, ltaddressgt
) fpgabitrange( ltnamegt, ltstartbitgt, ltnbitgt,
ltaddressgt ) fpgaword( ltnamegt, ltaddressgt
) fpgarange( ltnamegt, lt wordsgt, ltaddressgt )
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FPGA client library
Available register commands
fpgaread( ltnamegt ) fpgawrite( ltnamegt, ltvaluegt
) fpgaor_( ltnamegt, ltvaluegt ) fpgaand_( ltnamegt,
ltvaluegt ) fpgaxor_( ltnamegt, ltvaluegt )
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Example
-module(firfilter). this module is called
firfilter, driving one of those -behaviour(persona
lity). -export(registers/0, start_filter/2).
this module implements an FPGA personality
Called automatically by the FPGA control
framework registers() -gt ok,
fpgabitrange(num_tap, 5, 3,
1624), fpgabit(pps_enable, 28,
1624), fpgaword(control_status, 16abcc),
. define a high-level command for this
personality start_filter(FPGA, NumTap) -gt
disable the PPS fpgaexecute(FPGA,
fpgawrite(pps_enable, 0)), read the control
status register case fpgaexecute(FPGA,
fpgaread(control_status)) of 1 -gt
fpgaexecute(FPGA, fpgaxor(control_status,
42)) _ -gt ok end, however, you can easily
execute a number of commands in one
go fpgaexecute(FPGA, fpgawrite(num_tap,
NumTap), fpgawrite(pps_enable, 1)).
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Full correlator control system

• besides single fpga control
• parallel control of eight fpgas
• parsing validating configuration files
• using yecc
• decoding sending over UDP of binary data files
• data as well as polynomial coefficients
• capture network data to file
• configure and control the hardware
• MySQL read/write
• two weeks VHDL coding lt 1 day Erlang coding

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Full correlator control system
data reader
UniBoard
data reader
data writer
UniBoard
data reader
command/control
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The good

• cross platform
• we have Linux, Mac OSX and Solaris
• distributed
• typically many machines involved
• non-variability of variables
• conciseness / amount of work per LOC
• connects to MySQL
• not easy to connect other languages to mnesia
• hard crash on errors
• about the most valuable property cant ignore!
• binary pattern matching
• every language should be jealous of this
• re-use of development/testing code
• its so easy to re-use code!

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The bad

• our VHDL engineers struggle
• language simple, but
• concepts like recursion distribution are hard
• conciseness / amount of work per LOC
• takes effort to read code written by someone
  whos better at it than you
• deploying a developing distributed system
• we havent found a simple way yet
• dynamic remote code loading could be awsome
• it works for individual modules
• useless if you have dependencies ...

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Thank you for your attention!