Modern CPU Architectures Design Principles and Assessments

1
Modern CPU Architectures Design Principles and
Assessments

• First Meeting
• 23.04.2004

2
Agenda

• Topics
• Guidelines for your written report and
  presentation
• Organisation

3
Topics - Overview

• Part 1 Basics
• Impact of basic design decisions on different
  architectures
• Part 2 Analysis of specific processors
• Which design decisions were made?
• Explain them (trade-offs)

4
Topics Part1

• Topic 1 Caches
• size vs. latency
• power vs. size
• shared caches vs. hit rate
• associativity vs. latency
• hierarchies
• case studies
• Supervisor Günter Bartsch

5
Topics Part1

• Topic 2 Pipelines
• width vs. depth
• branch penalty/prediction
• scheduling
• case study (i.e. 4 deep pipes vs. 2 short ones)
• Supervisor TB?
• Topic 3 ISAs
• compact code vs. easy decoding (RISC/CISC)
• introduce existing instruction sets and
  extensions
• low power ISAs
• compiler issues (IPC, ILP)
• Supervisor GB?

6
Topics Part1

• Topic 4 Energy efficiency
• introduce measures (parallelize, clock, voltage,
  )
• impact of caches, pipelines, ISAs, architectures
  on power consumption
• Supervisor TB?
• Topic 5 SIMD
• trade-offs concerning width, latency, limits of
  the ISA, dual use of registers, in MMX, SSEx,
  VIS, Altivec,
• case study flexibility compare 2x2 vs. 4x1 vs.
  8x1
• Supervisor TB?

7
Topics - Part2

• Topic 6 Pentium 4
• ultra long pipeline
• trace cache
• double pumped ALU
• SMT
• Supervisor TB?
• Topic 7 Athlon64 / Opteron
• 64bit more wider registers
• memory controller on-chip
• Hyper Transport
• Supervisor TB?

8
Topics - Part2

• Topic 8 Power 4
• CMP 2 cores per die
• wide issue
• Supervisor TB?
• Topic 9 Itanium 2
• EPIC
• register file
• ultra large cache
• low power techniques
• Supervisor TB?

9
Topics - Part2

• Topic 10 Ultra SPARC III
• RISC
• Supervisor TB?
• Topic 11 Embedded CPUs
• ARM/XSCALE, MIPS, Alchemy,
• Supervisor Hakmi?
• Topic 12 free CPUs
• LEON, F-CPU, MMIX, OpenRISC,
• Supervisor Hakmi?

10
Topics - You choose

• Topic 1 (14.5.2004) Caches
• Topic 2 (21.5.2004) Pipelines
• Topic 3 (28.5.2004) ISAs
• Topic 4 (4.6.2004) Energy efficiency
• Topic 5 (4.6.2004) SIMD
• Topic 6 (11.6.2004) Pentium 4
• Topic 7 (11.6.2004) Athlon64 / Opteron
• Topic 8 (25.6.2004) Power 4
• Topic 9 (25.6.2004) Itanium 2
• Topic 10 (2.7.2004) Ultra SPARC III
• Topic 11 (9.7.2004) Embedded CPUs
• Topic 12 (16.7.2004)Free CPUs

11
About your Presentation

• See website for written guidelines
• read them carefully
• Talk should be about 40-50 minutes
• Either in English or German

12
About your written report

• Written report must be finished on the day the
  presentation is given
• Bring copies for everyone?
• Provide HTML/PDF version for the WWW
• See website for some literature references
• You're supposed to do some research on the topic
  yourself

13
Deadlines...

• Given x date of your presentation
• x-3 weeks Talk to your supervisor about the
  structure/outline/contents of your work
• x-2 weeks
• First complete version of your presentation
• First complete version of your written report
• x-1 weeks
• Rehearsal presentation in front of your
  supervisor
• Written report finished

14
Organisation

• First presentation 14.05.2004
• Seminar takes place always fridays, 0945
  1115 0.124
• Presenter stay after your presentation for
  feedback on your talk
• Don't hesitate to contact your supervisor when
  problems arise!