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PC Based Spectrum Analyzer

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Title: PowerPoint Presentation Author: Michael Cain Last modified by: Michael Cain Created Date: 2/16/2003 4:09:27 PM Document presentation format – PowerPoint PPT presentation

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Title: PC Based Spectrum Analyzer


1
PC Based Spectrum Analyzer
Phase III
May03-10
Client Teradyne Inc.
Faculty Advisor Dr. DJ Chen
Michael Cain Paul Heil Eric Rasmussen Aung Thuya
April 29, 2003
2
Acknowledgements
  • The team would like to thank
  • Teradyne
  • Steve Miller
  • Dr. Degang Chen

3
Presentation Outline
Problem Statement Operating Environment
Intended Use and Users Assumptions and
Limitations End Product Accomplishments
Approaches
Research Design Implementation Testing
Resources and Schedules Closing Materials
4
List of Definitions
DAC digital to analog converter DC offset DC
voltage in an AC signal FPGA field
programmable gate array Spectrum analyzer
measures magnitude of signal harmonics THD
total harmonic distortion
5
Problem Statement
Amplifier for PC Based Spectrum Analyzer
  • 100MHz high gain, low noise, low distortion
  • Programmable DC offset and frequency response
    calibration

6
Problem Statement (contd.)
7
Operating Environment
Normal lab conditions Low humidity, room
temperature
8
Intended Users and Uses
Users will be Teradyne test engineers Use will be
preamplifier for PC Based spectrum analyzer
9
Assumptions
  • Users
  • Teradyne test engineers are familiar with the
    operation of a spectrum analyzer
  • Requirements
  • Specifications are attainable
  • Financial Budget
  • Teradyne will cover project costs

10
Limitations
  • Hardware
  • Noise and distortion trade-off
  • Must have a stable configuration
  • Software
  • Simulation software limitations
  • Technical Knowledge
  • No experience with PC board fabrication

11
End Product
  • The end product will consist of the following
    deliverables
  • Analog amplifier design with embedded digital
    controls
  • Software for the embedded digital controls
  • Design and user documentation

12
Present Accomplishments
  • Research 100 completed
  • Analog amplifier design 100 completed
  • Digital controls 100 completed
  • Software controls 100 completed
  • Simulations 100 completed
  • Fabrication 0 completed
  • Testing 0 completed

13
Approaches Considered and Used
  • Amplifier Topology
  • Low noise amplifier (LNA)
  • Operational amplifier in resistive feedback

14
Approaches Considered and Used (contd.)
  • DC Offset Correction
  • Clocked ping-pong structure
  • Offset voltage referral
  • Successive approximation scheme

15
Approaches Considered and Used (contd.)
  • Frequency Response Calibration
  • Automatic
  • Manual

16
Project Definition Activities
  • Project scope was changed to a paper design
  • Occurred after design was submitted for
    fabrication
  • Will be completed by future team

17
Research Activities
  • Amplifier Topologies
  • Operational Amplifiers
  • DACs
  • FPGAs
  • Digital Potentiometers
  • Comparators

18
Design Activities
Amplifier Design
19
Design Activities (contd.)
20
Design Activities (contd.)
21
Design Activities (contd.)
DC offset correction
22
Design Activities (contd.)
Frequency response calibration
23
Design Activities (contd.)
24
Implementation Activities
Implementation was not necessary
25
Testing Activities
PSpice simulations for analog design Verilog
simulations for digital state machine
26
Other Significant Activities
User manual Estimated performance analysis Design
vault on CD
27
Resource Requirements
Personal Effort
28
Resource Requirements (contd.)
Total Cost
29
Schedule
Project Schedule
30
Project Evaluation
  • Schematic level implementation fully met
  • Simulations fully met
  • Fabrication not attempted
  • Testing not attempted

31
Commercialization
  • Only one will be fabricated for testing purposes
  • Will be a part of Teradynes Integra J750
  • Cost of J750 starts at 99,000

32
Recommendations for Future Work
  • Meet low noise requirement
  • Make frequency response calibration automatic
  • Fabricate board
  • Complete testing

33
Lessons Learned
  • Set up weekly meetings with client and team
  • Do not procrastinate
  • Make sure design tools are adequate
  • Do not be too optimistic with scheduling
  • Do not be too elaborate with complicated designs

34
Risk and Risk Management
  • Losing a team member
  • No available times for meetings
  • Parts ordered on time
  • Sending design to fabrication on time

35
Closing Summary
Learned a lot about amplifier topologies Team
skills improved Useful information passed to next
group
36
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