Design of Capacitive Displacement Sensors for Chip Alignment - PowerPoint PPT Presentation

About This Presentation
Title:

Design of Capacitive Displacement Sensors for Chip Alignment

Description:

However, with high R2 and R4, these electrodes increase C13. W1=q1Vab=q1q2/(4 pi epsilon R) Using gauss law div(D)=ro, ... PhD thesis, Universiteit Twente ... – PowerPoint PPT presentation

Number of Views:127
Avg rating:3.0/5.0
Slides: 38
Provided by: Master84
Category:

less

Transcript and Presenter's Notes

Title: Design of Capacitive Displacement Sensors for Chip Alignment


1
Design of Capacitive Displacement Sensors for
Chip Alignment
  • Jose Medina
  • Professor N. McGruer

2
Outline
  • Introduction
  • Displacement sensors
  • Capacitive sensors
  • FEM simulations
  • Readout circuit
  • Scaled models
  • Experiments
  • Conclusions

3
Introduction
  • Approach
  • Assemble
  • Alignment
  • Transfer

2
4
Introduction
  • Requirements
  • Accuracy to nm
  • Cost effective
  • Fast
  • Compatible
  • Fabrication
  • Electronics
  • Actuator (nanopositioner)
  • Variable gap
  • Connections to only one side

5
Displacement Sensors
Criteria Probe-based Optical Thermal Capacitive
Accuracy / /
Range - / / /
Speed -
Fabrication - --
Electronics integration -
Parasitic forces - / -/ --
Power consumption / -/
A. A. Kuijpers, Micromachined Capacitive
Ling-Range Displacement Sensor for
Nano-positioning of Microactuator Systems, PhD
thesis, Universiteit Twente
6
Capacitive sensors
  • Capacitive sensor literature
  • Widely used
  • Drug delivery, temperature/humidity sensors,
    automotive, positioners
  • No sensor moves in two dimensions

Modeling and Optimization of a Fast
Response Capacitive Humidity Sensor, Tetelin
Perspectives on MEMS in Bioengineering A
Novel Capacitive Position Microsensor, Pedrocci
7
Capacitive sensors
  • Electrodes on substrate and template

8
Capacitive sensor
  • CQ/Vf(geometry)
  • Chip alignment connections only on one electrode

9
Capacitive sensor
  • Complete system
  • Equivalent circuit

10
Capacitive sensor
  • Cantor set geometry
  • First level
  • Second level
  • Third level

11
Capacitive sensor
  • Central fractal geometry
  • First level
  • Second level
  • Third level

12
FEM simulations
  • Numerical method

A. Hiekes, SIEMENS Baxter, Capacitive Sensors
13
FEM simulations
  • Modeling scenarios
  • Closed system
  • Open boundary
  • Natural boundary condition
  • Trefftz domain
  • Infinite elements

ANSYS, Inc
14
FEM simulations
15
FEM Simulations
  • Models
  • Doped Si substrates
  • Glass top substrate
  • Glass bottom substrate

16
Readout Circuit
  • Converter
  • transforms a signal to another more convenient
  • Voltage applied at capacitor

17
Readout circuit
  • Alignment precision and converter performance
  • Circuits
  • Oscillator
  • AC-bridge
  • Transimpedance amplifier
  • Switched-capacitor
  • Sigma-Delta modulator

18
Readout circuit
  • Transimpedance amplifier
  • Synchronous demodulator
  • Low pass filter

19
Readout circuit
  • Switched-Capacitor Amplifier

20
Readout circuit
  • Sigma-Delta modulator
  • Cap-to-digital converter based on SC
    modulator

21
Scaled Models
  • Scaled models
  • How do and C scale with geometry?

22
Scaled Models
  • Theoretical accuracy
  • Scaled models

23
Experiments
  • Two PCBs
  • Large w/g ratio
  • Max accuracy?
  • Small w/g ratio
  • Geometry performance?

Short w/d ratio Short w/d ratio Top board Top board Bottom board Bottom board
Central group (mm) Width 0.03 0.762 0.06 1.524
Central group (mm) Spacing traces 0.03 0.762 0.03 0.762
Central group (mm) Spacing subgroups 0.09 2.286 0.12 3.048
Lateral group (mm) Width 0.15 3.81 0.3 7.62
Lateral group (mm) Spacing traces 0.15 3.81
Lateral group (mm) Spacing groups 0.45 11.43 0.54 13.716
Large w/d ratio Top board Top board Bottom board Bottom board
Trace width 0.12 3.048 cm 0.25 6.350 cm
Separation traces 0.12 3.048 cm 0.47 11.938 cm
Separation groups 0.36 9.144 cm
24
Experiments
  • Setup
  • Stage
  • PCBs
  • Readout circuit
  • AD7745
  • Connectors, wires
  • Computer

25
Experiments
  • Results large feature board
  • Experiments greater capacitance
  • Sim and experiments same profile
  • Experiments different results
  • Accuracy
  • 5fF (specs 4fF)
  • 0.1mm (calculations 2 µm)
  • Sim/exp results further for long displacements

26
Experiments
  • Results small feature board
  • Cap increases with displacement!
  • Similar profiles
  • Good performance
  • at short gap
  • Min largest gap
  • 3mm (u0.762 mm)

27
Conclusions
  • Simulations
  • DC capacitance
  • Ground close than at infinite
  • 5 electrodes stage
  • Sim/exp further for large gaps
  • Cap to stage dominant
  • Variations between experiments
  • Plates not parallel, gap varies
  • Increase cap with displacement
  • C13 and C23 decrease
  • C12 dominant, board perturbs E

28
Conclusions
  • Sensor design suggestion
  • Central fractal geometry
  • Width depends upon min/max gap
  • Min g/w lt 1/3 for last level to take over,
    ideally lt1/10
  • Max g/w lt 1 to avoid instabilities
  • Capacitor width w, levels u
  • Chip 15x15 mm sq ? sensor 0.5x0.5 mm sq

29
Conclusions
Min feature size 1 um 1 um 0.1 um 1 um
w strip-group 1 1-3 um 1-3 um 100-300 nm 1-3 um
w strip-group 2 1-15 um 1-15 um 0.1-1.5 um 1- 291 um
w strip-group 3 5-75 um 5-75 um 0.5-7.5 um 0.1 1.5 mm
w strip-group 4 25-375 um 25-375 um 2.5-37.5 um
w strip-group 5 0.125-1.875 mm 12.5-187.5 um
w strip-group 6 0.0625-0.9375 mm
Max gap 25 um 0.1 mm 1 mm 0.1 mm
Min gap 20 nm 20 nm 10 nm 20 nm
Max gap 25 um 0.1 mm 1 mm 0.1 mm
sets n 5 7 9 492
Xmin scaled 240 nm 34 nm 26 nm 5.8 nm
Xmin calculated 4.8 nm 0.68 nm 0.53 nm 0.11 nm
30
Thank you for you attention
  • Acknowledgments
  • Advisor Professor McGruer
  • Professors Adams, Busnaina, Muftu,
    Papageorgious, Sun
  • Students Prashanth, Juan Carlos Aceros, Peter
    Ryan, Andy Pamp, Siva, Harris Mussolis

31
Capacitive sensors
  • Definition Capacitance
  • Conductor a


  • e-

  • Vs
  • - - - - - - - - - - - - - -
    - - - - -
  • - - - - - - -
    - - -
  • Conductor b

32
FEM Simulations
  • Convergence

33
(No Transcript)
34
Switched-Capacitor amplifier
  • Sampling phase (f1 on, f2 off)
  • Charge-transfer phase (f1 off, f2 on)

35
Correlated Double Sampling
  • Sampling phase
  • Processing phase

36
Simulations switched-capacitors
37
Bandwidth switched-capacitors
Write a Comment
User Comments (0)
About PowerShow.com