Integrated Design Methodology: The Only Proven Way Nitin Deo Vice President, Product Marketing

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Integrated Design MethodologyThe Only Proven
WayNitin DeoVice President, Product Marketing
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The Terabit Food Chain
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The EDA Requirements

• High performance designs
• Structured custom techniques
• Programmability
• Reconfigurability
• High Capacity designs
• Exceeding 50 M gates today
• High-end package co-design
• Power sensitive designs
• Multi-Vt, multi-voltage designs
• Low power design techniques

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Nanometer Design Challenges

• Higher frequency (100 MHz to 1GHz)
• Consumer, Mobile applications
• Magma customers NEC, Nokia, Sony
• High capacity 1 to 10M gates
• Base stations, gaming, graphics
• Magma users Cisco, Broadcom, 3DLabs
• Power-sensitive designs
• Multi-vt, multi-Vdd designs
• Magma users IBM, NEC, Fujitsu, STMicro

1. Productivity
2. Complexity
3. Performance
4. Signal Integrity
5. Power

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Traditional IC design flows too complex

• Series of point tools that looks at various steps
• Wireload models are not useful
• Corrections at the end cause iterations
• Standalone analysis is dead
• Power and other manufacturing effects cannot be
  done as point solutions
• Files sizes are too big

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Magmas Integrated Solution
Integrated RTL-to-GDSII System

• Merge logical physical EDA technology
• Embed high accuracy, high speed analysis engines
• Eliminates massive data handling
• Eliminates mismatches in timing
• Streamlines IC design flow

Timing Constraints
GDS II
.LIB
RTL
Single executable
GDS II
Fastest Design Closure
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Magma Meets Nanometer Productivity Challenge
Increased productivity while achieving total
design closure
INC- Incomplete
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Blue Chip Customers
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Magma Alliances Foundation to Address
Time-To-Market
SMIC
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From RTL to TSMC Silicon
Customers RTL and Constraints
Integrated COT Methodology
Fab
TSMCs Libraries and Technology Rules 0.15 um,
0.13um, 90nm

• Mutual customers Broadcom, Vitesse, Internet
  Machines, PhyWorks, Sony, Hitachi, Panasonic,
  etc.
• Strong partnership for 90nm integration

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Why TSMC Chose Magma

• Magma can integrate TSMC process-tuned libraries
  with their proven EDA tools to improve faster
  time to volume.
• - Genda Hu, VP of Marketing, TSMC
• Magma worked closely with TSMC to
• Validate TSMCs library in Magmas design
  environment
• Benchmark TSMC libraries
• Ensure that Magma software supports TSMC
  manufacturing rules for 0.15?m, 0.13?m and 90nm
• Complex design rules, via farm rules, metal
  rules, multi Vt cells
• TSMC partnered with the industrys best to
  provide high quality libraries

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Magma Ready For IBM Technology

• Magma approved with validated Reference Flow for
  0.13um and 0.18um technologies including Blast
  Create and Blast Fusion
• Artisan libraries for 8SF and 7SF processes fully
  qualified
• Joint customers include 3DLabs, Vitesse,
  Intersil, Thomson Multi-Media, Clearspeed, etc.

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Partnership Roadmap

• Faraday is a close partner of UMC that provides
• Design services from RTL to GDS
• Libraries and IPs
• Tapeout services and product engineering services
• Their own standard products using their own IP
  manufactured by UMC
• Magma Faraday/UMC partnership roadmap consists
  of three implementation phases
• Mutual customers Faraday, Intersil, AMCC, etc.

Library Qualification
LAVA Flow Adoption
LAVA Flow Rollout
IP Qualification
IP Promotion
Advanced Technology Support
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Magma The Fastest Path Complete SOC For
Implementation
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Complex IP Integration with Glassbox Model

• Logic Abstraction Easy and Accurate

• Physical Abstraction Easy and Accurate

Abstract

• True Timing Abstraction Logic Physical
• Glassbox Model can be exported through IP-Lava

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Original ARM946 Compared With Glassbox Model
Original
Glassbox
Volcano Size 58 MB
Volcano Size 148 MB
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Production Use of ARM Cores Using Magma
Customer ARM Core Process (mm) Speed (MHz)
Sony 926 90 nm 330
TI 966 0.13 200
Samsung 946 0.13 221
ST 946 0.13 200
TSMC 926 0.13 208
Toshiba 926 0.14 200
Imagination 946 0.18 150
Fujitsu 926 0.18 150
Imagination 946 0.18 150
Intersil 946 0.18 150
Samsung 926 0.18 150
TI 725 0.25 95
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Production Use of MIPS Cores Using Magma

• Soft IP Implementation with ESP
• Recent Silicon-proven Implementations
• NEC CB12 (0.13um), 275 MHz
• NEC CB11 (0.18um), 234 Mhz
• Infineon C10 (0.18um), 150 MHz
• TI SR40 (0.13um), 285 MHz
• Silverback Artisan-TSMC 0.18um, 160 MHz

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Magma Fastest Growing EDA Company

• Strong Financial Momentum
• Cumulative quarterly growth over 33
• Most successful IPO of 2001
• Profitable with positive cash flows
• 208M in cash
• Strong market acceptance
• 400 tapeouts
• More than 50 customers worldwide
• 8 out of top 10 IC companies use Magma
• Strong team
• 285 employees worldwide
• 40 PhDs
• Large patent portfolio
• RD centers worldwide

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Key Innovations

• Patented Architecture
• Unified data model enables concurrent analysis,
  thereby eliminating iterations
• Eliminates file transfers simplifies data
  management
• Extensible architecture enables addition of new
  tools seamlessly
• Patented Methodology
• FixedTiming approach eliminates iterations
  between synthesis and PR
• Provides early predictability of achievable
  performance
• Glassbox abstraction enables accurate modeling
  for hierarchical designs
• Open system
• Supports standard interfaces with other tools
• TcL-based API enables easy access to design
  information

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The Fastest Growing Market
IC Implementation Market Share

• IC Implementation is RTL-to-GDSII tools
• SNPS DC PC Apollo
• CDN SPC Plato
• LAVA B-RTL B-Fusion
• This market will be one of the highest-growing
  markets in the next 2 years expected to be
  483M in 2006
• Magma market share currently at 31 and growing
  rapidly grew at a staggering 343 last year

2000
2001
Other 4
Source Gartner Dataquest (October 2002)
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Magma Advantage

• Fast, predictable, high-capacity front end
• Timing, Signal and Power Integrity solution
  within Implementation flow
• Open system for seamless fit in your design flow
• Proven to reduce TAT by 50 - 90 and development
  costs by 30 to 50

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Summary

• Magma The fastest path from RTL to Silicon
• Early predictability, best QoR
• Reduces TAT by 50-90
• Reduces cost by 30-50 per project
• Sustained technology leadership
• Clear leader at 0.18 mm and below
• Ready to deliver 90 nm designs - now
• Fastest growing EDA company
• Strong, profitable public corporation