EEL 3705 / 3705L Digital Logic Design

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EEL 3705 / 3705LDigital Logic Design

• Fall 2006Instructor Dr. Michael FrankModule
  2 Lab Introduction HW/SW Tools

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Lecture Outline

• Administrative matters
• Turn in prereq form, if not already
• 1st-week Lab Administrivia / Handouts
• Attendance sheet, prereq form, syllabus,
  guidelines
• Lab Introduction
• List of Lab Assignments
• Lab Notebook Guidelines
• Overview of the HW/SW tools to be used in lab
  for your design projects
• Altera UP2 development board
• Altera FLEX 10K and MAX 7000 PLDs
• Quartus II logic development software tool

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Planned Lab Assignments for Fall 06

1. Introduction to Basic Gates (AND, OR, XOR) With
   Quartus Software
2. ADDER, SUBTRACTOR, OR and AND Functions With a
   Selector Module
3. Arm/Disarm a Weapon of Mass Destruction
4. Top Secret Code Display
5. Electronic Device Test
6. Comparators
7. Arithmetic Functions and Selectors
8. Random Counter
9. Interface design to the TLC0831 analog-to-digital
   converter

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Guidelines for Use of Lab Notebooks
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Altera UP2 development board
Read theUser Guidefor details

• From University Program UP2 Education Kit
• Includes two PLDs (prog. logic devs.)
• EPF10K70 Member of the FLEX 10K family of PLDs
• EPM7128S Member of the MAX 7000 family of PLDs

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UP2 Board with Cable Connections
? To 9V PowerSupply
JTAGProgram-mingCable
VGACable(tomonitor)
Mousecable
? To PC ParallelPort
FLEX PLD
MAX PLD
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UP2 Board Close-Up
PWRin
PS2in
JTAGin
VGAout
FLEX Expansion Holes
7-SegmentDisplay
Crystal
Jumpers
FLEX 10K
7-SegmentDisplay
MAX Expansion Holes
LED banks
MAX 7000
FLEXDIPswitch
FLEXPushbuttons
MAXPushbuttons
MAX DIP switches
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Altera MAX 7000S series PLD

• Full part number EPM7128SLC84-7
• 84-pin PLCC package
• Plastic J-Lead Chip Carrier
• 2,500 usable gates
• 128 Macrocells
• 8 LABs
• Logic Array Blocks

Chipsocket
Pins
Femalepinheaders
PLCC Chip Package
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Altera FLEX 10K70 PLD

• Full part number of our chip EPF10K70RC240-4
• 240-pin RQFP package
• poweR Quad Flat Pack
• 3,744 LEs (Logic Elements)
• ea. w. 4-input LUT (Look-Up Table), flip-flop,
  routing
• 468 LABs (Logic Array Blocks)
• group the LEs together into 8-bit arrays
• 9 EABs (Embedded Array Blocks)
• 2,048 bits each for programmable megafunctions
• 70,000 typical gates
• 118,000 max

Pins
RQFP Chip Package
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Quartus II Logic Development Tool

• Supports the devices onour development board
• You can download a freeversion from Altera
• University-licensed version is installed on most
  college machines
• Extensive free documentation, tutorials, etc. can
  be downloaded from Alteras website

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Quartus II Built-In Tutorial

• Try going through this to gain some initial
  familiarity with Quartus feature set and
  development flow

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Lab 1 Pre-Lab MateralLogic Review / Preview

• Basic logic gates NOT, OR, AND, XOR

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Why Bits (Binary Digits)?

• As well learn, computers represent all
  information using bits.
• A bit means a binary (i.e., base 2) digit, 0 or
  1.
• This is done for several reasons
• Two states (digit values) is all that is really
  needed.
• Any desired information can be represented using
  sequences of bits.
• Encoding information using 2-state systems offers
  the best noise immunity for a given
  energy/information ratio.
• Computers based on bits tend to be the most
  energy-efficient.
• A bit conveniently can represent the truth value
  of any given proposition in Boolean logic.
• That is, true (1) or false (0).
• Bits can be simply and easily manipulated by
  simple hardware elements called logic gates.
• These implementing the basic operators of Boolean
  logic.

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Boolean Logic Review

• For reasoning about whether propositions
  (statements) are true (T) or false (F).
• The truth value of the proposition.
• The important functional operators of Boolean
  logic include
• NOT(x) T iff xF (otherwise F)
• AND(x,y) T iff both xT and yT
• OR(x,y) T iff either xT or yT, or both
• XOR(x,y) T iff either xT or yT, but not
  both

George Boole1815-1864
iff ifand only if
? exclusive OR
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Boolean Logic Notations

• You should be aware that any given expression of
  Boolean logic could be written in several styles
• Writing operators as functions
• XOR(OR(AND(a,b),NOT(c)),d)
• Using operator names infix (between their
  operands)
• ((a AND b) OR (NOT c)) XOR d
• Using mathematical logic operator symbols
• (a ? b) ? c ? d
• Using C programming language operators
• ((a b) c) d
• Using Boolean algebra notation

Preferred in this course
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Logic Gate Icons

• Inverter
• Logical NOT,Boolean complement
• AND gate
• Boolean product
• OR gate
• Boolean sum
• XOR gate
• exclusive-OR, sum mod 2

x
x
xy
y
xy
x
y
x
x?y
y
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Multi-input AND, OR, XOR

• Can extend these gates to arbitrarilymany
  inputs.
• Two commonlyseen drawing styles
• Note that the second style keeps the gate icon
  relatively small.

x1
x1x2x3
x2
x3
x1? x5
x1x5
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NAND, NOR, XNOR

• Just like the earlier icons,but with a small
  circle onthe gates output.
• Denotes that the output is complemented.
• Circles could also be placed on inputs.
• Means, input is complementedbefore being used.

x
y
x
y
x
y
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CMOS NAND gate implementation

• A NAND gate is particularly easyto implement in
  CMOS
• Simple 4-transistor circuit ?
• A NOR gate is equally simple,
• but slower,
• due to series pFETs
• If we wanted to, we could buildany computer
  using nothingbut NAND gates and wires!

Vdd
x
y
xy
Vss GND
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Lab 1 Goal Confirm Function of AND/OR/XOR Gates
in Quartus

• At the conclusion of lab 1, you should have
  obtained results that confirm the expected
  outputs of the AND, OR, and XOR gates for all
  four possible combinations of two input bits.
• Below, A and B are 4-bit signals that (at the
  specific time point sampled below) give the two
  input bits in each of the four different possible
  cases, while W, Y, and Z represent the
  corresponding outputs of the OR, AND, and XOR
  functions respectively.