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Title: Topic 1: Review of Combinational Logic Design


1
Topic 1Review of Combinational Logic Design
  • SFSU ENGR 852
  • Spring 2003
  • 1/27, 2/3

2
ResourcesCombinational Logic
  • http//jever.phys.ualberta.ca/gingrich/phys395/no
    tes/node117.html
  • Number Systems, Binary, Octal and Hexadecimal
    Numbers, Number Representation, Boolean Algebra,
    Logic Gates, Combinational Logic, Combinational
    Logic Design Using Truth Tables, The AND-OR Gate,
    Exclusive-OR Gate, Half and Full Adders,
    Multiplexers and Decoders
  • http//www.play-hookey.com/digital/derived_gates.h
    tml
  • Combinational Logic
  • http//6004.lcs.mit.edu/currentsemester/tutprobs/l
    ogic.pdf
  • To page 3
  • http//kom.auc.dk/logic/design.html
  • Design steps

3
What Well work on in this class
  • Review Combinational Sequential Circuits
  • Meally, Moore, Memory
  • Introduce Asynchronous Circuits
  • Design of Large Digital Systems
  • Examine How to Test Those Circuits
  • Show How To Interface with the Real World
  • How Digital Circuits Are Actually Designed
  • CAD Tools
  • Implementation Options

4
Big Topic Large System Design
  • Take a description of a large system
  • For example, a car A thing you can ride in that
    can get you from one place to another.
  • Break it into smaller parts
  • Some way to make it go, some way to make it stop,
    and some way to make it turn.
  • Break those parts into smaller parts
  • How to make it go Gas peddle, connection to
    valve, spark to make gas explode, place to let
    gas explode without exploding other things
  • Stop when you have a piece that you know you can
    build.

5
Design and implementation
  • Top down design
  • Example Break telephone into small blocks that
    you know you can design.
  • Bottom up implementation
  • Build the small blocks
  • Move up a level to the block that contains the
    blocks you just designed.
  • Build that block using the blocks you just
    designed.

6
In our case
For example A Radio
A/D (Analog to Digital converter)
A data digital data processing block.
D/A (Digital to Analog converter)
Analog
Analog
Digital
7
Schedule
  • Combinational and sequential circuit design
  • Asynchronous system and circuit design
  • Larger digital systems
  • Microcontroller use and design
  • RAM use in designs
  • CAD and implementation methods
  • Circuit and chip testing

8
Why Digital Design?
  • Because its kinda fun
  • Can play at a higher level than analog
  • Can do math on/manipulate digital values
  • Can select and adjust values
  • Values hard to corrupt
  • Harder to mistake 0 1 than 3.7894 3.4952
  • Because you can build anything
  • Learn interfacing methods and its true!

9
Basics 1 Analog vs. Digital
10
Basics 2 How You Build
  • Building by Gate
  • Find Boolean Logic then Draw Design in Gates
  • VHDL, Verilog, ABEL Other HDLs
  • Write a Program
  • State Flow Model
  • Draw a State Machine
  • Transistor level
  • Draw at layout or transistor level
  • Program a microprocessor
  • Write an machine language program (or use a
    compiler)

11
Basics 3 What You Build
  • Combinational Circuits
  • Not Clocked
  • Sequential
  • Clocked
  • Has State
  • Asynchronous
  • No Clock but Has State. Huh?

12
Basics 4 Components
  • AND (NAND)
  • OR (NOR)
  • XOR (XNOR)
  • INV (Inverter)
  • MUX
  • Flip-Flop
  • Latch

13
Class QuestionBasic Components
14
Combinational Logic Design
  • Steps in Designing a Combinational Circuit

UNDERSTAND PROBLEM!!!!!!!!!
Step 1
UNDERSTAND PROBLEM!!!!!!!!!
Step 2
UNDERSTAND PROBLEM!!!!!!!!!
Step 3
UNDERSTAND PROBLEM!!!!!!!!!
Step 4
15
Combinational Logic Design
  • Steps in Designing a Combinational Circuit

UNDERSTAND PROBLEM!!!!!!!!!
Step 1
Determine I/O
Step 2
Truth Table
Step 3
Generate Logic Equations
Step 4
Draw Logic
Step 5
16
Combinational Logic ExampleStep 1
  • Step 1
  • Understand Problem
  • A Circuit Which Subtracts 2 From a 3-bit Number
  • Example
  • If input is 101 (5), output is 011
  • Is Description Complete?

17
Combinational Logic ExampleStep 1
  • Step 1
  • Understand Problem
  • A Circuit Which Subtracts 2 From a 3-bit Number
  • Example
  • If input is 101 (5), output is 011
  • Is Description Complete?
  • What Happens When the Input is 1?
  • Lets Limit Input to Values Greater than 1.

18
Combinational Logic ExampleStep 2
  • Step 2
  • Determine I/O

Circuit-to-be
19
Combinational Logic ExampleStep 3
  • Step 3
  • Truth Table
  • Tool 1

X2 X1X0 Y2 Y1Y0
0 0 0 X X X 0 0 1
X X X 0 1 0 0 0 0
0 1 1 0 0 1 1 0 0
0 1 0 1 0 1 0 1 1
1 1 0 1 0 0 1 1 1
1 0 1
20
Combinational Logic ExampleStep 4
  • Step 4
  • Generate Logic Eq.
  • From TT
  • SOP
  • POS
  • K-Map
  • SOP
  • POS
  • Guess? (By examination)

X2 X1X0 Y2 Y1Y0
0 0 0 X X X 0 0 1
X X X 0 1 0 0 0 0
0 1 1 0 0 1 1 0 0
0 1 0 1 0 1 0 1 1
1 1 0 1 0 0 1 1 1
1 0 1
21
Combinational Logic ExampleStep 4 SOP
  • Step 4
  • From TT
  • SOP
  • Sum of Products
  • Look For 1s
  • Y2X2 X1 X0 X2 X1 X0 X2 X1
  • Y1 X2 X1 X0 X2 X1 X0 X2 X1
  • Y0 X2 X1 X0 X2 X1 X0 X2 X1 X0
  • X2 X1 X0 X2 X0
  • (OR Y0 X0. X can be Anything so it can be
    1 in the second row)

X2 X1X0 Y2 Y1Y0
0 0 0 X X X 0 0 1
X X X 0 1 0 0 0 0
0 1 1 0 0 1 1 0 0
0 1 0 1 0 1 0 1 1
1 1 0 1 0 0 1 1 1
1 0 1
22
Combinational Logic ExampleStep 4 POS
  • Step 4
  • From TT
  • POS
  • Product of sums
  • Look For 0s
  • Y2(X2X1X0)(X2X1X0)
  • (X2X1X0)(X2X1X0)
  • X2?X1
  • Y1 (X2X1X0)(X2X1X0)
  • (X2X1X0)(X2X1X0)
  • X1 Y0 left for you to do.

X2 X1X0 Y2 Y1Y0
0 0 0 X X X 0 0 1
X X X 0 1 0 0 0 0
0 1 1 0 0 1 1 0 0
0 1 0 1 0 1 0 1 1
1 1 0 1 0 0 1 1 1
1 0 1
23
Combinational Logic ExampleStep 4 SOP K-MAP
  • Step 4
  • K-map
  • Tool 2
  • SOP
  • Sum of Products
  • Look For 1s

X2 X1X0 Y2 Y1Y0
0 0 0 X X X 0 0 1
X X X 0 1 0 0 0 0
0 1 1 0 0 1 1 0 0
0 1 0 1 0 1 0 1 1
1 1 0 1 0 0 1 1 1
1 0 1
24
Combinational Logic ExampleStep 4 SOP K-MAP
  • Step 4
  • K-map (SOP)
  • Most Convenient to Make Xs in First Column zeros.
  • Logic Becomes Y2 X2X1

X2 X1X0 Y2 Y1Y0
0 0 0 X X X 0 0 1
X X X 0 1 0 0 0 0
0 1 1 0 0 1 1 0 0
0 1 0 1 0 1 0 1 1
1 1 0 1 0 0 1 1 1
1 0 1
25
Combinational Logic ExampleStep 4 SOP K-MAP
  • Step 4
  • K-map (SOP)
  • Most Convenient to Make Xs in First Column ones.
  • Logic Becomes Y1 X1

X2 X1X0 Y2 Y1Y0
0 0 0 X X X 0 0 1
X X X 0 1 0 0 0 0
0 1 1 0 0 1 1 0 0
0 1 0 1 0 1 0 1 1
1 1 0 1 0 0 1 1 1
1 0 1
26
Combinational Logic ExampleStep 4 SOP K-MAP
  • Step 4
  • K-map (SOP)
  • Most Convenient to Make X in First Row a Zero and
    X in Second Row a One.
  • Logic Becomes Y0 X0

X2 X1X0 Y2 Y1Y0
0 0 0 X X X 0 0 1
X X X 0 1 0 0 0 0
0 1 1 0 0 1 1 0 0
0 1 0 1 0 1 0 1 1
1 1 0 1 0 0 1 1 1
1 0 1
27
Combinational Logic ExampleStep 4 POS K-MAP
  • Step 4
  • K-map (POS)
  • Most Convenient to Make Xs in First Column zeros.
    (This table isnt a good example of POS).
  • Logic Becomes Y2 X2 X1 Therefore Y2
    X2X1

X2 X1X0 Y2 Y1Y0
0 0 0 X X X 0 0 1
X X X 0 1 0 0 0 0
0 1 1 0 0 1 1 0 0
0 1 0 1 0 1 0 1 1
1 1 0 1 0 0 1 1 1
1 0 1
28
Combinational Logic ExampleStep 2
  • Step 2
  • Determine I/O

29
Combinational Logic ExampleStep 5
  • Step 5
  • Draw K-MAP SOP logic
  • Y2 X2 X1
  • Y1 X1
  • Y0 X0

Y0
X0
Y1
X1
Y2
X2
30
Combinational Logic ExampleStep 4 POS K-MAP
  • Step 4 (Example. Not related to example weve
    been doing)
  • K-map (New Random Table to Show a Better Example
    of Finding Reduced POS From K-Map)
  • Logic Becomes Y (X2X1)(X2X1)

31
Class QuestionDrawing Gates
  • Step 5
  • Draw logic gates for last slide

32
Combinational Logic ExampleStep 4
  • Step 4
  • Last Choice Method for Determining Logic Guess
  • (By Examination)

33
Class Questions Incrementer and Pattern Matcher
  • Design 1 (incrementer) Specifications
  • Adds 1 to Input.
  • Design 2 (Pattern Matcher) Specification
  • Matches any value with exactly two 1s. Input is
    a 3-bit number.

Label and show all steps. Do SOP, POS, K-map
SOP, K-map POS
34
Combinational Logic Design
  • Steps in Designing a Combinational Circuit

UNDERSTAND PROBLEM!!!!!!!!!
Step 1
Determine I/O
Step 2
Truth Table
Step 3
Generate Logic Equations
Step 4
Draw Logic
Step 5
35
Class QuestionA Simple System
  • Now that you have
  • How would you make the following circuit

36
Cascaded Logic
  • Though the last class question may have seemed
    trivial, it is very powerful in building larger
    circuits. Lets look at one more example of
    cascading smaller blocks.

37
Cascaded Logic
  • Example Divide-by-ten circuit
  • Understand the problem (Big picture)
  • Input A number. At least 4-bits wide. Here lets
    say 8 bits
  • Output Quotient Remainder

38
Cascaded Logic
  • Make some design decisions
  • How do you do it by hand?
  • If you subtract 1010 from four bits and the
    result is greater than 0 you put a 1 in the
    quotient

39
Cascaded Logic
  • Make some design decisions
  • How do you do it by hand?
  • If you subtract 1010 from four bits and the
    result is less than 0 you put a 0 in the
    quotient

40
Cascaded Logic
  • Make some design decisions
  • How do you do it by hand?
  • If you subtract 1010 from four bits and the
    result is greater than 0 you concatenate the next
    bit in the dividend to the end of the result and
    start the process over with that number

41
Cascaded Logic
  • Make some design decisions
  • How do you do it by hand?
  • If you subtract 1010 from four bits and the
    result is less than 0 you concatenate the next
    bit in the dividend to the end of the original
    4-bits and start the process over with that number

42
Cascaded Logic
  • Make some design decisions
  • Design a per-step block using by-hand model
  • Input A 5-bit wide number (Call it IN).
  • Output Original number if IN- 1010 lt 0
  • IN 1010 if IN- 1010 ? 0
  • 0 if IN- 1010 lt 0
  • 1 if IN- 1010 ? 0

Dividend
Quotient Bit
43
Cascaded Logic
  • Design the block

44
Cascaded Logic
  • Design circuit

Remainder
45
Class Question?Half-adder, Full-adder
  • Build a single-bit adder
  • A B Sum and Carry
  • Build a single bit adder with carry-in
  • A B Carry-in Sum and Carry

Label and show all steps.
46
Class Question
  • Build a 4-bit adder using half-adder and full
    adder blocks.

47
Other Combinational Logic Implementations
  • What weve done
  • Gate-based logic
  • Component based logic
  • ROM-based combinational logic
  • Decoder-based combinational logic

48
ROM Based logic
  • First, what is a ROM?
  • Read-Only-Memory
  • Remember what gate-based logic is You put
    something in (inputs) and get something out (a
    value).
  • Whats ROM? You put something in (address) and
    get something out (a value).

49
Basic ROM Memory3x8 ROM
50
ROM-Based Logic Example
  • Say youre given
  • Y A?B A?C
  • Make a truth table

Y
51
ROM-Based Logic Example
  • Hmmmm. The truth table/circuit looks a lot like
    the ROM picture back a couple of slides.

A B C
3x8 ROM
Y
52
ROM-Based Logic Example
  • I contend that the ROM below is an implementation
    of the logic equation Y A?B A?C

A B C
Y
3x1 ROM
Address Value 000 0
001 1 010 0 011
1 100 1 101
1 110 0 111
0
Address/ABC
Data/Y
3
53
ROM-Based Logic Design Steps
  • Steps
  • Determine I/O. (How many inputs? How many
    outputs?) ?Select ROM size
  • Draw truth table.
  • Burn values into ROM.

54
Class QuestionROM-Based Logic
  • Implement the following circuit in a ROM
  • Y2 X2 X1
  • Y1 X1
  • Y0 X0

55
Decoder-Based logic
  • First, what is a decoder?

56
Decoder-Based logic
  • Remember what gate-based logic is You put
    something in (inputs) and get something out (a
    value).
  • Whats Decoder? You put something in (a value)
    and get something out (a high value on the line
    of the input value).

57
Decoder-Based Logic Example
  • Say youre given
  •  
  • Make a truth table

_ _ _ _ _
_ Y A?B?C A?B?C A?B?C A?B?C
Y
58
Decoder-Based logic
  • The implementation (SOP) (Fewer 1s than 0s)

_ _ _ _ _
_ Y A?B?C A?B?C A?B?C A?B?C
59
Decoder-Based logic
  • The implementation (POS) (Fewer 0s than 1s)

_ _ _ _ _ _ Y
A?B?C A?B?C A?B?C A?B?C
60
DeMorgans Theorem
  • DeMorgan's Theorem
  • The most important logic theorem for digital
    electronics, this theorem says that any logical
    binary expression remains unchanged if we
  • Change all variables to their complements.
  • Change all AND operations to ORs.
  • Change all OR operations to ANDs.
  • Take the complement of the entire expression.

http//www.cs.iupui.edu/ddillow/N301/deMorgan.htm
l
61
DeMorgans Theorem
The Gates                                      
                         
62
Decoder-Based logic
  • The implementation (POS) (Fewer 0s than 1s)

_ _ _ _ _
_ Y (A?B?C) ?(A?B?C)?(A?B?C)?(A?B?
C)
63
Review of Combinational Logic Generation
64
Class QuestionWhat Logic to select?
  • Many outputs
  • Many inputs
  • Many zeros in output
  • Dont want to test much
  • Needs to be small
  • Needs to be fast

65
Class QuestionDeMorgans
  • Implement in all NAND gates and inverters

66
Class QuestionDeMorgans
  • Implement in all NAND gates and inverters

67
Class QuestionDeMorgans
  • Implement in all NAND gates and inverters

68
Another Look at Design
  • Where to Start?
  • Maybe Youll see the Big Picture
  • Sometimes Easy to Overlook Things
  • ? I want you to follow steps for all problems
    done for this class.
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