Title: Exploratory Ideas in Using RTL Symbolic Simulation for Test Instruction Generation
1Exploratory Ideas in Using RTL Symbolic
Simulation for Test Instruction Generation
- Supratik Chakraborty, Sasidhar Sunkari, Kailas
Maneparambil, Vivek Vedula
2Overall Problem Statement
- Given
- RTL description of large design
- Properties (possibly spanning multiple cycles) on
specific signals - We wish to
- Symbolically simulate the design
- Derive symbolic relations between inputs and
signals of interest under given conditions - Solve symbolic constraints to identify
instruction sequences for checking given
properties
3Why work at RTL-level?
- Circuits of the scale of microprocessors
- Bit-level representation Tens of millions of
signals - Inefficient reasoning even with state-of-the-art
techniques - Abstraction is key to scaling
- With increasing abstraction level
- Size of abstract model reduces easier to reason
- Additional behaviours allowed by model increases
- RTL description
- Design-structure preserving abstraction
- Datapath operations on words instead of bits
- Can keep spurious behaviours under control to
significant extent by appropriate word-level
reasoning
4RTL vs Bit-level Expressions
RTL description
Symbols
Symbolic Expressions
- Must represent and manipulate symbolic expr
efficiently - DAG representation of symbolic expressions
- Word-level Size grows as word-level RTL
description of circuit - Requires use of (complex)
word-level functions - Complex reasoning on
large expressions - Bit-level Size grows as bit-level description
of circuit - Requires use of basic
bit-level functions only - Simpler reasoning on extremely
large expressions
5High-level Breakup of Approach
- First phase
- Symbolic simulation for getting RTL-level
relations between inputs and signals of interest - Manage the complexity of representing and
manipulating large symbolic expressions - Second phase
- Develop ability to solve RTL-level expressions to
yield test instruction sequences - Leverage existing work on word-level SAT solving
and also develop new techniques - Fault-grade generated test instructions
- Extensive experimentation needed to fine-tune
strategies for generating solving expressions
6Some Initial Observations
- Problem of scale
- Symbolic expressions can get complicated,
unwieldy - Affects performance of simulation and solving
- End goal of test instr generation offers more
freedom than formal verification in managing
problem of scale - Can use approximation strategies for generating
symbolic expressions and also for solving them - Con Generated test may not hit desired condition
- Fault grading of tests essential
- Hope Significant percentage of tests can be made
useful with right choice of approximation
strategies
7Some Initial Observations
- End goal Test instruction generation
- Not interested in yes/no questions (formal
verification) that limit scope of approximations - Interested in instruction sequences useful for
testing corner-case scenarios - Acceptable even if instruction sequence obtained
by solving an approximate constraint - Offers more possibility of using approx to our
benefit - Important distinction
- Symbolic simulation for test generation allows
more freedom for approximation than for formal
verification - Can we exploit this effectively?
8Some Initial Observations
- Approximations in symbolic simulation
- When RTL symbolic expressions are created, use
suitable approximations if they get complicated - Good approximations expected to exploit
functional information embedded in RTL/domain
knowledge - Main focus of todays talk
- Approximations for making RTL symbolic simulation
more tractable
9Approximation in CAD
- Approximation methods widely used in CAD
- Gives practically useful solutions to problems
whose exact solutions are computationally hard - Boolean function minimization in synthesis
- Static timing analysis with false paths,
reconvergent fanouts - Reachability analysis in formal verification
- Power estimation from HDL description
- Scheduling and allocation in high-level synthesis
- Automatic test pattern generation ..
10Success of Approximation (partial list)
- Automated logic synthesis tools
- Approximate Boolean function minimization
- Exact Quine-McCluskey minimization exponentially
hard - Spin model checker
- Bit-state hashing an approximation technique
- Widely used in FV community
- Approximate state space reachability
- Work of Cabodi, Cho, Govindaraju, Gupta, Ganai
- Made possible the approximate exploration of
state spaces of large sequential circuits - Abstractions (approximations) in program
verification - SLAM project at Microsoft Research
- Rich theory Cousot Cousot
11Approximation in Symbolic Simulation
- Not a brand new idea
- C.-J.H. Seger and R.E. Bryants seminal work
(multiple papers) on symbolic simulation and
symbolic trajectory evaluation using ternary
valued logic (approximating bit-level values) - Symbolic Simulation with Approximate Values, C.
Wilson, David L. Dill, R.E. Bryant, FMCAD 2000 - Demonstrated to work well on medium-sized
industrial circuits at bit-level - Hope We can make it work for RTL-expressions
with the objective of test instruction generation.
12Symbolic Simulation and Approximation in our
Context
- Symbolic simulation of modules in microprocessors
- Use symbols for words, instructions, control
signals - Expressions formed by applying high-level
operators (possibly non-arithmetic/logic) on
these symbols - Uninterpreted functions to be used as far as
possible - Interpretation may be forced when approximating
or when solving - Interpretation to be avoided for blocks whose
outputs dont affect desired property on signals - Approximation to be introduced as size of
expression blows up - Accuracy of symbolic relations traded off with
complexity (space time) of manipulating and
solving
13Simplifying Expressions
- Word-level symbolic expressions appear attractive
- But, size of expr (? size of RTL) can become
large - Can we simplify a bit?
- Canonicalizing expressions
- Equivalent expressions represented by unique DAG
- Often reduces DAG size makes simulation/solving
easier - Example (A0..15 word_plus ZERO0..15)
equiv to A0..15 - Non-trivial to implement
- Requires word-level reasoning with complex
functions - Semi-canonicalization may be more practical
- Partial identification of equivalent expressions
- Conditional canonicalization
- Identifying expression equivalence under given
conditions
14Approximate Symbolic Expressions
- Eventual use of symbolic expressions
- Getting solutions to sets of symbolic constraints
- Using solutions to obtain desired test instr
sequences - Approximate expressions
- Lead to approximate solutions
- Over-approximation Relaxing constraints
- All true solutions contained in approximate
solution - May contain spurious solutions
- Under-approximation Restricting constraints
- All approximate solutions are true solutions
- May miss some true solutions
15 How to Approximate?
- Simple symbolic expression DAG
System of symbolic constraints (expressions in
prefix notation)
(E (word_plus (bitcatenate E1 E2)
time_adv(
word_mult(E3, E4)
) ) ) AND (E1 ..) AND
(E2 ..) AND (E3 ..) AND (E4 ..)
- Conjunction of sub-constraints
- Can we replace sub-constraints
- with more/less relaxed ones?
16Approximation Relations
- Original expression
- Approximate expression
(E (word_plus (bitcatenate E1 E2)
time_adv(
word_mult(E3, E4)
) ) ) AND (E1 ..) AND
(E2 ..) AND (E3 ..) AND (E4 ..)
Approximated to
E
word_plus
bitcatenate
time_adv
R1, R2 approximate relations between
subexpressions Can now eliminate subexpr
affecting only E3 or E4
word_mult
E2
E1
E3
E4
17Solving with Approximate Constraints
Example system of constraints to be solved
Actual solution
Overapprox relation
Approximated to
Underapprox relation
Possible solution space yielding test
instruction sequence
18A Naive Approximation Strategy
- Build symbolic expressions bottom up from RTL
- Semi-canonicalize once size exceeds threshold T1
- Once size exceeds threshold T2 (T2 gt T1)
- Identify subexpressions for which it is
beneficial to introduce approximate relations - Include approximate relations in set of
constraints - Exclude constraints that affect only those
subexpressions which have been approximated. - Continue until size reduces below T2
- Store original constraints for approximated
subexpressions - To be used in case approximate system of
constraints does not yield desired results
19Finding Approximation Relations
- Several possible strategies
- A carefully designed set of syntactic rules
- E (A word_plus B),
- F (A word_plus (B word_mult C)
- A, B, C positive words
- Overapprox relation F word_greater_than_eq E
- Underapprox relation (F E) OR (F EB)
- Infer implications through a simple incomplete
word-level decision procedure - Constr1 ? Constr2 Constr1 is underapprox of
Constr2 - Constr2 is
overapprox of Constr1
20Finding Approximation Relations
- Further strategies
- Extrapolate from bit-level approximations
- Consider all words as 1-bit long
- Use bit-level techniques (e.g. BDDs / SAT
solving) to find bit-level over- and
under-approximations - Extrapolate to word-level over- and
under-approximations - Caveat Not all bit-level approximations can be
extrapolated in this way
21Finding Approximation Relations
- Further strategies
- Simplify symbolic expressions using values from
lattice of possible values (e.g. 0, 1, X, X as
words) - Using all Xs for some symbolic inputs, if we
find that a constraint C1 simplifies to C2 - C2 over-approximates C1
- Using specific constants (0, 1, etc) for some
symbolic inputs, if we find that C1 simplifies to
C2 - C2 under-approximates C1
22Finding Approximation Relations
- Further strategies
- Suppose final symbolic constraint to be solved
- (constr1 ? constr2) AND constr3
- constr2 can be approximated considering
- (? constr3 ? ? constr1) as dont care
- Approximate constraints using knowledge of other
constraints
Actual solutions
Solution space
Overapprox of const2
Underapprox of constr2
23Finding Approximation Relations
- A crucial step for simplifying expressions and
still obtaining desired solutions - Quality of approximation relations affects
accuracy of results - Quality depends on
- Choosing right subexpressions to relate through
approximation relations - Formulating right approximation relations
- Efficiency of constructing relations also
important - Soliciting suggestions from others!
24Hierarchy of Approximations
- Approximating relation between E1, E2 leads to
lower accuracy than - Approximating relation between E3, E4, E5, E6, OR
- Approximating relation between E2, E6, E5
- Gives rise to a hierarchy of approximation
relations - Approximation relations can also be made more
accurate by using computationally more expensive
inferences - Also gives rise to a hierarchy
Symbolic expr DAG
E
E2
E1
E3
E6
E4
E5
25Hierarchy of Approximations
- Approximations between subexpressions higher up
in DAG representation are more approximate - Hierarchy of approximate expressions
- Quality of approximation reduces as we go higher
in hierarchy - Expressions become simpler as we go higher in
hierarchy - Separate hierarchies for over- and
under-approximation relations - Can use only one of over- or under-approximation
hierarchies when simplifying expressions - Mixing may take us out of solution space
26Proposal for Research
- Extensive experimentation needed
- Right approximation strategies to be identified
based on structure and operators used in
expressions - Need to find right balance on the continuum of
accuracy-complexity tradeoff - Should be done primarily through experimentation
- Theoretical underpinnings to ensure that chosen
strategies do not mix over- under-approximations
- Research to figure out
- Right approx strategies when building expressions
- Ability to solve expressions with these
approximations - of generated tests that hit conditions of
interest
27Proposed Plan of Action
- Short-term
- Use Forte to estimate complexity/seq depth of
symbolic expressions (at bit-level) of a part of
x86 model developed at IIT Madras - Feel for the complexity of expressions at
bit-level - Useful for quantifying benefits of word-level
symbolic simulation - Verilog to Exlif conversion to be done at Intel
- Environment model (providing sequence of symbolic
instructions) for STE being done at IIT Bombay - Should be over in a few weeks time
28Proposed Plan of Action
- First phase
- Use x86 model from IIT Madras and also picoJava
model from Sun as benchmarks for developing
word-level symbolic simulator - Expect a first prototype symbolic simulator in
6-8 months time from now - Symbols for words -- no bit-level splitting in
expressions (unlike Forte) - Use high-level operators, possibly uninterpreted
- Simultaneously look for patterns of operator
combinations that allow for replacement by sound
approximations - Syntactic approach to begin with
29Proposed Plan of Action
- First phase
- Incorporate simplification of expressions by
approximation relations in simulator - Ensure output expressions are in format that are
easily parseable by existing word-level SAT
solvers and also by solver to be developed in
second phase - Possible student visit to Intel, Bangalore to
ensure that simulator works well for Intel
designs - M.Tech. Student (Sasidhar Sunkari) already
working on this
30Proposed Plan of Action
- Second phase
- Develop capability to solve symbolic expressions
generated by symbolic simulator - Expect to start work on this before completion of
first phase by student from next batch of M.Tech.
students - Propose to use the SMT (Satisfiability Modulo
Theories) and ICS (Integrated Canonizer and
Solver)-type approaches to solve this - Incorporate special theories for high-level
operators on words - Integrate these theories with existing theories
of bit-vectors, Booleans, uninterpreted
functions, etc. - Looking for more suggestions
31Conclusion
- Preliminary ideas for controlling size of
symbolic expressions while still ensuring that we
can use them to get test instruction sequence - Need research on finding good and efficiently
computable approximation relations - More research on developing theories for solving
word-level expressions - Soliciting inputs and feedback on overall
potential of idea - More details to be worked out