ENGR 4862 Microprocessors Lecture 20

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ENGR 4862 MicroprocessorsLecture 20
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8086/8088 and Supporting Chips

• 8086/8088 Microprocessor
• 8237 DMA (Direct Memory Access) controller to
  transfer data
• 8284 Clock generator providing critical timing
  for the microprocessor
• 8288 Provide control signals
• 8253/8254 Timer
• 8255 Port expansion
• 8259 Interrupt controller

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The 8088 Chip

• Minimum mode and maximum mode

Address signals
Address and data (low 8-bit) signals
Control signals
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8088 / 8086 CPU in Min Mode
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8086/88 uP and Supporting Chips

• Data Bus
• Pins AD0 AD15 for 8086 Pins AD0 AD7 for 8088
• Great effort to minimize the number of pins for
  external connection ? Multiplexed address and
  data busses
• ALE (Address Latch Enable)Signals whether the
  information is address or data
• When address is sent, ALE HIGH
• When data is to be sent out or in, ALE LOW
• Bidirectional bus goes through 74LS245
  transceiver
• DT/R and DEN two signals to activate the
  transceiver
• DT/R HIGH transmit information from uP A ? B
• DT/R LOW receive information from outside B ?
  A

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Role of ALE in Addr/Data Demux
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ALE Timing in 8088 Based System
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D Latch (74LS373)
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BidirectionalBuffer(74LS245)
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8086/88 uP and Supporting Chips

• Address Bus
• To demultiplex the address signals from the
  address/data pins ? A latch must be used
• 74LS373 is commonly used to grab the address
• Two purposes 1) Latch the address from the 8088
  and provide address to the entire computer
• Controlled by signal AEN and ALE
• When AEN (connect to OE) is LOW, 8088 provides
  address bus to the system. The 8088 provide ALE
  (connect to G) to enable to latch the address
  from the CPU. Thus providing a 20-bit stable
  address to all memory, peripheral and expansion
  slots
• 2) To isolate the system address bus from local
  address bus
• System busses could be used by DMA or other
  boards through the expansion slots. Must not
  disturb CPU. Achieved by AEN

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Local Bus vs. System Bus

• Local Bus to the left of the 8288, 74LS373,
  74LS245
• System Bus everything to the right side of those
  chips
• Why Bus buffering (boosting)?
• When a pulse leaves an IC, it can lose source of
  its strength, depending on how far away the
  receiving IC chip is located
• The more pins a signal is connected to, the
  stronger the signal must be to drive them all ?
  Thus we need buffering
• Bus buffering is nothing more than boosting the
  signals traveling on the bus ? commonly used
  74LS244, 245
• Signals provided by the CPU need boosting since
  8086/88 is a CMOS chip and MOS has a much lower
  driving capability than that of TTL

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8088 Connection and Bus in IBM/XT