Lowpower highslewrate CMOS buffer amplifier for flat panel display drivers

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Low-power high-slew-rate CMOS bufferamplifier
for flat panel display drivers
ELECTRONICS LETTERS 16th February 2006 Vol. 42
No. 4

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• EmailS94662005_at_mail.ncue.edu.tw

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Author
S.K. Kim, Y.-S. Son and G.H. Cho (Division of
Electrical Engineering, Department of Electrical
Engineering and Computer Science (EECS), Korea
Advanced Institute of Science and
Technology (KAIST), 373-1, Guseong-dong
Yuseong-gu, Daejeon 305-701, Republic of Korea)
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Outline

• Introduction
• Proposed circuit
• Experiment and results
• Conclusions
• Simulation by DIY

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Introduction

• The columns of flat display panels using liquid
  crystal displays (LCDs) and organic light
  emitting diodes (OLEDs) are heavily capacitive
  electronically.
• As the display resolution increases, the load
  capacitance of one buffer increases, whereas the
  required settling time decreases.
• A high-slew-rate buffer amplifier with low static
  power consumption is indispensable.
• We present a newly developed buffer amplifier
  that consumes a very low static current and has a
  high slew rate.

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Proposed circuit

• NMOS-input stage ? output PMOS MPPMOS-input
  stage ? output NMOS MN
• Folded cascode.
• Symbol explanation.
• Unit-gain buffer.

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Feedback technology
feedback
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NMOS part

• IM7(A)IM4(A)IM10(A) and IM7(A)IM8(A)
• k1 is the size ratio of M9(A) and M10(A)

0ltk1lt1
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k3 is the size ratio of M5(A) and MP(N).
k2 is the size ratio of M9(A) and M11(A)
Note that by letting the constant current sources
IM3(A) and IM4(A) be very small, the amplifier
can be designed toconsume a very low static
current.
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• The parameters that control the maximum sourcing
  or sinking current are vbp(n)2, the size of
  M7(A),and the size ratios of k2 and k3.

• It should be noted that the preceding two
  parameters (vbp(n)2, M7(A)) can be designed
  independently of the static bias current.

• The Early effect and mismatches of transistors
  are neglected.

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Vin gt Vin-
(ak1) (a)
Vin lt Vin-
(b) (b) (bk3)
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Experiment and results

• We manufactured the proposed buffer amplifier
  using a 0.35 µm CMOS process.
• The proposed buffer has a possible slew rate
  higher than 10 V/µs for a load capacitance of1 nF
  almost independently of static currents as low as
  1µA.
• The steady-state errors between the input and
  output voltages were less than 10 mV in the
  entire operating region.

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Conclusions

• High-slew-rate buffer amplifier that has great
  potential for applications in flat panel
  displays.
• A large current-driving capability by employing
  well-controlled positive current feedback loops
  and has control parameters for the maximum
  driving current.

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Simulation by DIY
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VOLTAGE OFFSET (10 mv)
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Slew-Rate and Power
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END THANKS!!