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Ensuring model consistency during frontend design using a tool based description method called NETLI

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... model consistency during front-end design using a tool based description method called NETLISP ... NOT a new kind of. simulator. 7. Case study: a front-end ... – PowerPoint PPT presentation

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Title: Ensuring model consistency during frontend design using a tool based description method called NETLI


1
Ensuring model consistency during front-end
design using a tool based description method
called NETLISP
  • Michael GoffioulGerd VandersteenJoris Van
    DriesscheBjorn DebaillieBoris Comes

2
A front-end design usesvarious levels of
abstraction
Description of the system
?
3
Architecture exploration specification
methodology
4
Guaranteeing consistency betweenabstraction
levels is crucial !
Description of the system
Digital modem model
FE Simple behavioral model
FE Architectural behavioral model
Cascade Analysis
RF IC design
Support for Design Verification
3. Conversions needed over and over again
5
Common description guarantees consistency !
Description of the system
Commondescription
FE Simple behavioral model
FE Architectural behavioral model
Cascade Analysis
RF IC design
Support for Design Verification
6
NETLISt ProcessingA tool to process and
manipulate netlists
NOT a new kind of simulator
Normal User Interface
NETLISP NETLISt Processing
Importing netlists
Processing / manipulating netlist
Code generators
Exporting varioussimulation files
MATLAB dataflow
Cascade analysis
Verilog-A
Spectre

Perform simulations Post-processing
7
Case study a front-end design
Description of the system
Digital modem model
FE Simple behavioral model
FE Architectural behavioral model
Cascade Analysis
RF IC design
Support for Design Verification
8
Exploration phaseFind the implementation losses
of behavioral model
  • Behavioral model
  • MATLAB dataflow simulation
  • Analog front-end low-pass equivalent
    representation
  • Digital dataflow model in MATLAB
  • Generation of MATLAB function
  • out f(in, P)
  • out, in low-pass equivalent
  • P parameters

9
Example of MATLAB dataflow generation
RxFE (in -gt out) LNA (in -gt lnaout)
amplifier gain 10dB nf 3.5 dB RFMix
(lnaout -gt out) mixer gain 2.7 dB
RXFE
LNA
RFMix
  • Access and manipulation in MATLAB
  • Generation of function RxFE_DF.m
  • Setting and getting parameters
  • RxFE_DF(set, RxFE.LNA.gain, 5)
  • Simulation
  • RxFE_DF(simulate, )
  • Write modified netlist
  • RxFE_DF(write-netlist, )

10
Case study a front-end design
Description of the system
Digital modem model
FE Simple behavioral model
FE Architectural behavioral model
Cascade Analysis
RF IC design
Support for Design Verification
11
Cascade phaseDistribute the implementation
losses
Behavioral model
LO
CLK
RF-IN
BB-OUT
I/Q
LNA
Mixer
LPF
ADC
Imbalance
Architectural model
12
Cascade phaseFind the implementation losses of
behavioral model
  • Architectural model
  • MATLAB cascade analysis
  • Analog Gain, Noise figure, IIP3
  • Digital AGC algorithm in MATLAB
  • Generation of MATLAB function
  • out f(in, P)
  • out, in Signal and distortion levels
  • P Parameters

13
Example of MATLAB cascade analysis
RxFE (in -gt out) LNA (in -gt lnaout)
amplifier gain 10dB nf 3.5 dB RFMix
(lnaout -gt out) mixer gain 2.7 dB
RXFE
LNA
RFMix
  • Access and manipulation in MATLAB
  • Generation of function RxFE_CA.m
  • Similar MATLAB interface
  • RxFE_CA (set, RxFE.LNA.gain, 5)
  • RxFE_CA (simulate, )
  • RxFE_CA (write-netlist, )
  • Signal represenation signal/noise/distortion
    levels

14
The cascade phase computes all signal and
distortion levels
Signal to Inband Disto Ratio Signal to Inband
NoiseDisto Ratio Signal to Noise Ratio Signal to
Disto Ratio Specification
15
Case study a front-end design
Description of the system
Digital modem model
FE Simple behavioral model
FE Architectural behavioral model
Cascade Analysis
RF IC design
Support for Design Verification
16
Analog design phase Passing the specification
to the analog designer using Verilog-A
?
  • Generation of a Verilog-A Model
  • Uses a Verilog-A library
  • Can be used for co-simulation
  • Analog designer receives a simulatable
    specification
  • Test benches can be verifiedusing the Verilog-A
    model

17
Example of Verilog-A generation
RxFE (in -gt out) LNA (in -gt lnaout)
amplifier gain 10dB nf 3.5 dB RFMix
(lnaout -gt out) mixer gain 2.7 dB
RXFE
LNA
RFMix
  • subckt RxFE (in out)
  • LNA (in lnaout) amplifier gain10 nf 3.5
  • RFMix (lnaout out) mixer gain2.7
  • ends RxFE

18
Case study a front-end design
Description of the system
Digital modem model
FE Simple behavioral model
FE Architectural behavioral model
Cascade Analysis
RF IC design
Support for Design Verification
19
Digital design phaseUse the dataflow model to
develop the digital front-end
  • Testing of
  • Automatic gain control
  • Energy / performance trade-offs
  • Calibration and compensation schemes.

20
ConclusionModel consistency during front-end
design is possible
  • Model consistency through a common description
  • NETLISP a programmable and extensible framework
  • Various import and export modules
  • Fast iterations are possible
  • Demonstrated on an energy-scalable front-end
    design
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