Bipolar Junction Transistors: Basics

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Bipolar Junction Transistors Basics
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BJT Symbols and Currents
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BJT configurations
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BJT Fabrication
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PNP BJT Electrostatics
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NPN Transistor Band Diagram Equilibrium
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PNP Transistor Active Bias Mode
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PNP Physical Currents
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PNP transistor amplifier action
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Emitter Injection Efficiency - PNP

• Measure of hole current vs total emitter current
• Electron backwards current detracts from
  amplification
• Want ? as close as possible to 1 for high gain

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Base Transport Factor - PNP

• How many of the holes injected into the base make
  it to the other side?
• Again,
• Want ?T as close as possible to 1 for high gain
• Recombining holes dont help

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Common Base DC current gain - PNP

• Common Base Active Bias mode

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Common Base DC current gain - PNP
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Common Emitter DC current gain - PNP
IC
IB
IE
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PNP BJT Common Emitter Characteristic
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Supplementary Material Bipolar Transistor
Flow Junction Isolation Process
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Following initial cleaning, an SiO2 layer is
thermally grown on the silicon substrate.
Photoresist is spun on the wafer to prepare for
the first masking operation.
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Mask 1 patterns the photoresist. The SiO2 layer
is removed where it is not protected by the
photoresist by dry etching.
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An N implant is performed to dope the buried
layer region. As or Sb would typically be used
here because they have smaller diffusivities than
P.
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  The buried layer is driven in using a high
temperature furnace cycle.
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The SiO2 is etched off the surface and an N type
epitaxial layer is grown. Note that during the
epi growth, the buried layer diffuses upwards
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SiO2 is thermally grown on the surface and
photoresist is spun on. Mask 2 is used to define
the resist and then the SiO2 layer is etched
using the resist as a mask.
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A boron implant dopes the isolation regions.
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The P isolation regions are driven down to the P
substrate to laterally isolate the devices. SiO2
is grown on the surface during this drive-in.
Note that the buried layer continues to diffuse
upwards during this high temperature step.
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Photoresist is spun onto the wafer and mask 3 is
used to define the base regions. The SiO2 is
etched and a boron implant forms the base region.
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The base region is driven-in to its final
junction depth. A surface SiO2 layer is grown as
part of this drive-in process.
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Photoresist is spun onto the wafer and mask 4 is
used to define the emitter and collector contact
regions. The SiO2 is etched and an arsenic
implant forms the N regions.
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The N regions are driven-in to their final
junction depth. A surface SiO2 layer is grown as
part of this drive-in process.
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Photoresist is spun onto the wafer and mask 5 is
used to define the contact regions. The SiO2 is
etched.
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Aluminum is deposited on the wafer. Photoresist
is then spun onto the wafer and mask 6 is used
to define the wiring regions. The Al is then
etched. Stripping the photoresist completes the
overall process flow.
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N
N
P


P
P
N

N
P
Diodes can be made with the metal mask connecting
the collector and base together Resistors made
with two contacts to any isolated doped area
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Oxide-isolated bipolar process
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Self-Aligned Double Poly Bipolar - NPN
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Self-Aligned Double Poly Bipolar - NPN